-
Notifications
You must be signed in to change notification settings - Fork 730
New issue
Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.
By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.
Already on GitHub? Sign in to your account
[gpio] Incorrect register mask values in specification #41
Comments
Those are auto generated registers. Looks like there is a bug in the bit expansion. The bogus Register enable= should not be there anymore (it isn't in the version on bubble), the fix for that went in a couple of weeks ago. |
Hi Mark, Thanks for your reply. I see "Register enable=" removed after refreshing the page. Best Regards, |
@mdhayter @eunchan - Can you please clarify on mask values for INTR_STATE, INTR_ENABLE and INTR_TEST? For GPIO, all 32-bits of these register are writable, so I believe their mask values should be 0xffff_ffff. |
Sorry for the delayed response. Could you please point the location of mask info? I cannot find in the c header, nor RTL (gpio_reg_pkg.sv) |
That is due to the multibit of interrupt signal. Let me take a look at auto interrupt register generation code. |
@eunchan this was discussed in the GPIO V3 signoff review. Please create an new issue on reggen update, and close this. Thx. |
@eunchan, ping. |
@eunchan what is the status on this old bug? |
Add clickable diagram to documentation landing page
Hi Eunchan,
Register Mask values for following GPIO registers seem incorrect to me:
(1) gpio.INTR_STATE @ + 0x0
mask 0x1
(2) gpio.INTR_ENABLE @ + 0x4
mask 0x1
(3) gpio.INTR_TEST @ + 0x8
mask 0x1
For all 3 registers above, I think that mask value should be 0xffff_ffff as all 32-bits are defined.
I am not sure whether mask means represents "defined"/"unreserved" bits or "writable bits"?
Also, I see "Register enable =" in all registers. Are we missing some information here?
Best Regards,
Gaurang
The text was updated successfully, but these errors were encountered: