Skip to content

Commit

Permalink
Fix the broken encodings for the VFP vmov.f32 and vmov.f64 instructio…
Browse files Browse the repository at this point in the history
…ns, as well as the comments that explain them incorrectly.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136707 91177308-0d34-0410-b5e6-96231b3b80d8
  • Loading branch information
resistor committed Aug 2, 2011
1 parent b93509d commit 96279d0
Showing 1 changed file with 8 additions and 6 deletions.
14 changes: 8 additions & 6 deletions lib/Target/ARM/ARMInstrVFP.td
Original file line number Diff line number Diff line change
Expand Up @@ -36,13 +36,15 @@ def vfp_f32imm : Operand<f32>,
return ARM::getVFPf32Imm(N->getValueAPF()) != -1;
}]> {
let PrintMethod = "printVFPf32ImmOperand";
let DecoderMethod = "DecodeVFPfpImm";
}

def vfp_f64imm : Operand<f64>,
PatLeaf<(f64 fpimm), [{
return ARM::getVFPf64Imm(N->getValueAPF()) != -1;
}]> {
let PrintMethod = "printVFPf64ImmOperand";
let DecoderMethod = "DecodeVFPfpImm";
}


Expand Down Expand Up @@ -1091,9 +1093,9 @@ def FCONSTD : VFPAI<(outs DPR:$Dd), (ins vfp_f64imm:$imm),
// Encode instruction operands.
let Inst{15-12} = Dd{3-0};
let Inst{22} = Dd{4};
let Inst{19} = imm{31};
let Inst{18-16} = imm{22-20};
let Inst{3-0} = imm{19-16};
let Inst{19} = imm{31}; // The immediate is handled as a float.
let Inst{18-16} = imm{25-23};
let Inst{3-0} = imm{22-19};

// Encode remaining instruction bits.
let Inst{27-23} = 0b11101;
Expand All @@ -1114,9 +1116,9 @@ def FCONSTS : VFPAI<(outs SPR:$Sd), (ins vfp_f32imm:$imm),
// Encode instruction operands.
let Inst{15-12} = Sd{4-1};
let Inst{22} = Sd{0};
let Inst{19} = imm{31}; // The immediate is handled as a double.
let Inst{18-16} = imm{22-20};
let Inst{3-0} = imm{19-16};
let Inst{19} = imm{31}; // The immediate is handled as a float.
let Inst{18-16} = imm{25-23};
let Inst{3-0} = imm{22-19};

// Encode remaining instruction bits.
let Inst{27-23} = 0b11101;
Expand Down

0 comments on commit 96279d0

Please sign in to comment.