makestuff edited this page Sep 21, 2014 · 1 revision

The aim of the FPGALink project is to provide a hardware abstraction layer for hardware involving an FPGA connected to a computer over USB, to abstract core functionality like FPGA-programming and subsequent host-FPGA communication. It doesn't matter whether the hardware uses an AVR, an FX2LP or an ARM-based micro for its USB interface. It doesn't matter whether the FPGA is from Xilinx or Altera or Lattice or whomever. It doesn't matter whether the interface between them is a fast 43MiB/s parallel synchronous interface, a much slower EPP interface or some sort of USART connection. The cross-platform, cross-language host-side API is the same, and the FPGA-side (VHDL or Verilog) FIFO interface is the same, so you can easily port your design to a new FPGA devkit or to your own custom PCB.


User manual VHDL edition (needs updating!)

User manual Verilog edition (needs updating!)

Host-side API docs

Support mailgroup

Source code

Quick-starts for several devkits

This is just a selection; there are many more supported configurations.

Quickstart for Aessent aes220

Quickstart for Canton Electronics LX9 (requires external AVR board)

Quickstart for Digilent Atlys

Quickstart for Digilent FMC Carrier S6

Quickstart for Digilent Nexys2

Quickstart for Digilent Nexys3

Quickstart for MakeStuff LX9R3

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