-
Notifications
You must be signed in to change notification settings - Fork 2k
/
drcbex64.cpp
5164 lines (4390 loc) · 189 KB
/
drcbex64.cpp
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
581
582
583
584
585
586
587
588
589
590
591
592
593
594
595
596
597
598
599
600
601
602
603
604
605
606
607
608
609
610
611
612
613
614
615
616
617
618
619
620
621
622
623
624
625
626
627
628
629
630
631
632
633
634
635
636
637
638
639
640
641
642
643
644
645
646
647
648
649
650
651
652
653
654
655
656
657
658
659
660
661
662
663
664
665
666
667
668
669
670
671
672
673
674
675
676
677
678
679
680
681
682
683
684
685
686
687
688
689
690
691
692
693
694
695
696
697
698
699
700
701
702
703
704
705
706
707
708
709
710
711
712
713
714
715
716
717
718
719
720
721
722
723
724
725
726
727
728
729
730
731
732
733
734
735
736
737
738
739
740
741
742
743
744
745
746
747
748
749
750
751
752
753
754
755
756
757
758
759
760
761
762
763
764
765
766
767
768
769
770
771
772
773
774
775
776
777
778
779
780
781
782
783
784
785
786
787
788
789
790
791
792
793
794
795
796
797
798
799
800
801
802
803
804
805
806
807
808
809
810
811
812
813
814
815
816
817
818
819
820
821
822
823
824
825
826
827
828
829
830
831
832
833
834
835
836
837
838
839
840
841
842
843
844
845
846
847
848
849
850
851
852
853
854
855
856
857
858
859
860
861
862
863
864
865
866
867
868
869
870
871
872
873
874
875
876
877
878
879
880
881
882
883
884
885
886
887
888
889
890
891
892
893
894
895
896
897
898
899
900
901
902
903
904
905
906
907
908
909
910
911
912
913
914
915
916
917
918
919
920
921
922
923
924
925
926
927
928
929
930
931
932
933
934
935
936
937
938
939
940
941
942
943
944
945
946
947
948
949
950
951
952
953
954
955
956
957
958
959
960
961
962
963
964
965
966
967
968
969
970
971
972
973
974
975
976
977
978
979
980
981
982
983
984
985
986
987
988
989
990
991
992
993
994
995
996
997
998
999
1000
// license:BSD-3-Clause
// copyright-holders:Aaron Giles
/***************************************************************************
drcbex64.c
64-bit x64 back-end for the universal machine language.
****************************************************************************
Future improvements/changes:
* Add support for FP registers
* Optimize to avoid unnecessary reloads
* Identify common pairs and optimize output
* Convert SUB a,0,b to NEG
* Optimize, e.g., and [r5],i0,$FF to use rbx as temporary register
(avoid initial move) if i0 is not needed going forward
****************************************************************************
-------------------------
ABI/conventions (Windows)
-------------------------
Registers:
RAX - volatile, function return value
RBX - non-volatile
RCX - volatile, integer function parameter 1
RDX - volatile, integer function parameter 2
RSI - non-volatile
RDI - non-volatile
RBP - non-volatile
R8 - volatile, integer function parameter 3
R9 - volatile, integer function parameter 4
R10 - volatile
R11 - volatile, scratch immediate storage
R12 - non-volatile
R13 - non-volatile
R14 - non-volatile
R15 - non-volatile
XMM0 - volatile, FP function parameter 1
XMM1 - volatile, FP function parameter 2
XMM2 - volatile, FP function parameter 3
XMM3 - volatile, FP function parameter 4
XMM4 - volatile
XMM5 - volatile
XMM6 - non-volatile
XMM7 - non-volatile
XMM8 - non-volatile
XMM9 - non-volatile
XMM10 - non-volatile
XMM11 - non-volatile
XMM12 - non-volatile
XMM13 - non-volatile
XMM14 - non-volatile
XMM15 - non-volatile
-----------------------------
ABI/conventions (Linux/MacOS)
-----------------------------
Registers:
RAX - volatile, function return value
RBX - non-volatile
RCX - volatile, integer function parameter 4
RDX - volatile, integer function parameter 3
RSI - volatile, integer function parameter 2
RDI - volatile, integer function parameter 1
RBP - non-volatile
R8 - volatile, integer function parameter 5
R9 - volatile, integer function parameter 6
R10 - volatile
R11 - volatile, scratch immediate storage
R12 - non-volatile
R13 - non-volatile
R14 - non-volatile
R15 - non-volatile
XMM0 - volatile, FP function parameter 1
XMM1 - volatile, FP function parameter 2
XMM2 - volatile, FP function parameter 3
XMM3 - volatile, FP function parameter 4
XMM4 - volatile
XMM5 - volatile
XMM6 - volatile
XMM7 - volatile
XMM8 - volatile
XMM9 - volatile
XMM10 - volatile
XMM11 - volatile
XMM12 - volatile
XMM13 - volatile
XMM14 - volatile
XMM15 - volatile
---------------
Execution model
---------------
Registers (Windows):
RAX - scratch register
RBX - maps to I0
RCX - scratch register
RDX - scratch register
RSI - maps to I1
RDI - maps to I2
RBP - pointer to code cache
R8 - scratch register
R9 - scratch register
R10 - scratch register
R11 - scratch register
R12 - maps to I3
R13 - maps to I4
R14 - maps to I5
R15 - maps to I6
Registers (Linux/MacOS):
RAX - scratch register
RBX - maps to I0
RCX - scratch register
RDX - scratch register
RSI - unused
RDI - unused
RBP - pointer to code cache
R8 - scratch register
R9 - scratch register
R10 - scratch register
R11 - scratch register
R12 - maps to I1
R13 - maps to I2
R14 - maps to I3
R15 - maps to I4
Entry point:
Assumes 1 parameter passed, which is the codeptr of the code
to execute once the environment is set up.
Exit point:
Assumes exit value is in RAX.
Entry stack:
[rsp] - return
Runtime stack:
[rsp] - r9 home
[rsp+8] - r8 home
[rsp+16] - rdx home
[rsp+24] - rcx home
[rsp+40] - saved r15
[rsp+48] - saved r14
[rsp+56] - saved r13
[rsp+64] - saved r12
[rsp+72] - saved ebp
[rsp+80] - saved edi
[rsp+88] - saved esi
[rsp+96] - saved ebx
[rsp+104] - ret
***************************************************************************/
#include "emu.h"
#include "drcbex64.h"
#include "debug/debugcpu.h"
#include "emuopts.h"
#include <cstddef>
// This is a trick to make it build on Android where the ARM SDK declares ::REG_Rn
// and the x64 SDK declares ::REG_Exx and ::REG_Rxx
namespace drc {
using namespace uml;
using namespace asmjit;
using namespace asmjit::x86;
//**************************************************************************
// DEBUGGING
//**************************************************************************
#define LOG_HASHJMPS (0)
#define USE_RCPSS_FOR_SINGLES (0)
#define USE_RSQRTSS_FOR_SINGLES (0)
#define USE_RCPSS_FOR_DOUBLES (0)
#define USE_RSQRTSS_FOR_DOUBLES (0)
//**************************************************************************
// CONSTANTS
//**************************************************************************
const uint32_t PTYPE_M = 1 << parameter::PTYPE_MEMORY;
const uint32_t PTYPE_I = 1 << parameter::PTYPE_IMMEDIATE;
const uint32_t PTYPE_R = 1 << parameter::PTYPE_INT_REGISTER;
const uint32_t PTYPE_F = 1 << parameter::PTYPE_FLOAT_REGISTER;
//const uint32_t PTYPE_MI = PTYPE_M | PTYPE_I;
//const uint32_t PTYPE_RI = PTYPE_R | PTYPE_I;
const uint32_t PTYPE_MR = PTYPE_M | PTYPE_R;
const uint32_t PTYPE_MRI = PTYPE_M | PTYPE_R | PTYPE_I;
const uint32_t PTYPE_MF = PTYPE_M | PTYPE_F;
#ifdef X64_WINDOWS_ABI
const Gp::Id REG_PARAM1 = Gp::kIdCx;
const Gp::Id REG_PARAM2 = Gp::kIdDx;
const Gp::Id REG_PARAM3 = Gp::kIdR8;
const Gp::Id REG_PARAM4 = Gp::kIdR9;
#else
const Gp::Id REG_PARAM1 = Gp::kIdDi;
const Gp::Id REG_PARAM2 = Gp::kIdSi;
const Gp::Id REG_PARAM3 = Gp::kIdDx;
const Gp::Id REG_PARAM4 = Gp::kIdCx;
#endif
//**************************************************************************
// MACROS
//**************************************************************************
#define X86_CONDITION(condition) (condition_map[condition - uml::COND_Z])
#define X86_NOT_CONDITION(condition) negateCond(condition_map[condition - uml::COND_Z])
#define assert_no_condition(inst) assert((inst).condition() == uml::COND_ALWAYS)
#define assert_any_condition(inst) assert((inst).condition() == uml::COND_ALWAYS || ((inst).condition() >= uml::COND_Z && (inst).condition() < uml::COND_MAX))
#define assert_no_flags(inst) assert((inst).flags() == 0)
#define assert_flags(inst, valid) assert(((inst).flags() & ~(valid)) == 0)
//**************************************************************************
// GLOBAL VARIABLES
//**************************************************************************
drcbe_x64::opcode_generate_func drcbe_x64::s_opcode_table[OP_MAX];
// size-to-mask table
//static const uint64_t size_to_mask[] = { 0, 0xff, 0xffff, 0, 0xffffffff, 0, 0, 0, 0xffffffffffffffffU };
// register mapping tables
static const Gp::Id int_register_map[REG_I_COUNT] =
{
#ifdef X64_WINDOWS_ABI
Gp::kIdBx, Gp::kIdSi, Gp::kIdDi, Gp::kIdR12, Gp::kIdR13, Gp::kIdR14, Gp::kIdR15,
#else
Gp::kIdBx, Gp::kIdR12, Gp::kIdR13, Gp::kIdR14, Gp::kIdR15
#endif
};
static uint32_t float_register_map[REG_F_COUNT] =
{
#ifdef X64_WINDOWS_ABI
6, 7, 8, 9, 10, 11, 12, 13, 14, 15
#else
// on AMD x64 ABI, XMM0-7 are FP function args. since this code has no args, and we
// save/restore them around CALLC, they should be safe for our use.
0, 1, 2, 3, 4, 5, 6, 7
#endif
};
// condition mapping table
static const CondCode condition_map[uml::COND_MAX - uml::COND_Z] =
{
CondCode::kZ, // COND_Z = 0x80, requires Z
CondCode::kNZ, // COND_NZ, requires Z
CondCode::kS, // COND_S, requires S
CondCode::kNS, // COND_NS, requires S
CondCode::kC, // COND_C, requires C
CondCode::kNC, // COND_NC, requires C
CondCode::kO, // COND_V, requires V
CondCode::kNO, // COND_NV, requires V
CondCode::kP, // COND_U, requires U
CondCode::kNP, // COND_NU, requires U
CondCode::kA, // COND_A, requires CZ
CondCode::kBE, // COND_BE, requires CZ
CondCode::kG, // COND_G, requires SVZ
CondCode::kLE, // COND_LE, requires SVZ
CondCode::kL, // COND_L, requires SV
CondCode::kGE, // COND_GE, requires SV
};
#if 0
// rounding mode mapping table
static const uint8_t fprnd_map[4] =
{
FPRND_CHOP, // ROUND_TRUNC, truncate
FPRND_NEAR, // ROUND_ROUND, round
FPRND_UP, // ROUND_CEIL, round up
FPRND_DOWN // ROUND_FLOOR round down
};
#endif
//**************************************************************************
// TABLES
//**************************************************************************
const drcbe_x64::opcode_table_entry drcbe_x64::s_opcode_table_source[] =
{
// Compile-time opcodes
{ uml::OP_HANDLE, &drcbe_x64::op_handle }, // HANDLE handle
{ uml::OP_HASH, &drcbe_x64::op_hash }, // HASH mode,pc
{ uml::OP_LABEL, &drcbe_x64::op_label }, // LABEL imm
{ uml::OP_COMMENT, &drcbe_x64::op_comment }, // COMMENT string
{ uml::OP_MAPVAR, &drcbe_x64::op_mapvar }, // MAPVAR mapvar,value
// Control Flow Operations
{ uml::OP_NOP, &drcbe_x64::op_nop }, // NOP
{ uml::OP_DEBUG, &drcbe_x64::op_debug }, // DEBUG pc
{ uml::OP_EXIT, &drcbe_x64::op_exit }, // EXIT src1[,c]
{ uml::OP_HASHJMP, &drcbe_x64::op_hashjmp }, // HASHJMP mode,pc,handle
{ uml::OP_JMP, &drcbe_x64::op_jmp }, // JMP imm[,c]
{ uml::OP_EXH, &drcbe_x64::op_exh }, // EXH handle,param[,c]
{ uml::OP_CALLH, &drcbe_x64::op_callh }, // CALLH handle[,c]
{ uml::OP_RET, &drcbe_x64::op_ret }, // RET [c]
{ uml::OP_CALLC, &drcbe_x64::op_callc }, // CALLC func,ptr[,c]
{ uml::OP_RECOVER, &drcbe_x64::op_recover }, // RECOVER dst,mapvar
// Internal Register Operations
{ uml::OP_SETFMOD, &drcbe_x64::op_setfmod }, // SETFMOD src
{ uml::OP_GETFMOD, &drcbe_x64::op_getfmod }, // GETFMOD dst
{ uml::OP_GETEXP, &drcbe_x64::op_getexp }, // GETEXP dst
{ uml::OP_GETFLGS, &drcbe_x64::op_getflgs }, // GETFLGS dst[,f]
{ uml::OP_SAVE, &drcbe_x64::op_save }, // SAVE dst
{ uml::OP_RESTORE, &drcbe_x64::op_restore }, // RESTORE dst
// Integer Operations
{ uml::OP_LOAD, &drcbe_x64::op_load }, // LOAD dst,base,index,size
{ uml::OP_LOADS, &drcbe_x64::op_loads }, // LOADS dst,base,index,size
{ uml::OP_STORE, &drcbe_x64::op_store }, // STORE base,index,src,size
{ uml::OP_READ, &drcbe_x64::op_read }, // READ dst,src1,spacesize
{ uml::OP_READM, &drcbe_x64::op_readm }, // READM dst,src1,mask,spacesize
{ uml::OP_WRITE, &drcbe_x64::op_write }, // WRITE dst,src1,spacesize
{ uml::OP_WRITEM, &drcbe_x64::op_writem }, // WRITEM dst,src1,spacesize
{ uml::OP_CARRY, &drcbe_x64::op_carry }, // CARRY src,bitnum
{ uml::OP_SET, &drcbe_x64::op_set }, // SET dst,c
{ uml::OP_MOV, &drcbe_x64::op_mov }, // MOV dst,src[,c]
{ uml::OP_SEXT, &drcbe_x64::op_sext }, // SEXT dst,src
{ uml::OP_ROLAND, &drcbe_x64::op_roland }, // ROLAND dst,src1,src2,src3
{ uml::OP_ROLINS, &drcbe_x64::op_rolins }, // ROLINS dst,src1,src2,src3
{ uml::OP_ADD, &drcbe_x64::op_add }, // ADD dst,src1,src2[,f]
{ uml::OP_ADDC, &drcbe_x64::op_addc }, // ADDC dst,src1,src2[,f]
{ uml::OP_SUB, &drcbe_x64::op_sub }, // SUB dst,src1,src2[,f]
{ uml::OP_SUBB, &drcbe_x64::op_subc }, // SUBB dst,src1,src2[,f]
{ uml::OP_CMP, &drcbe_x64::op_cmp }, // CMP src1,src2[,f]
{ uml::OP_MULU, &drcbe_x64::op_mulu }, // MULU dst,edst,src1,src2[,f]
{ uml::OP_MULS, &drcbe_x64::op_muls }, // MULS dst,edst,src1,src2[,f]
{ uml::OP_DIVU, &drcbe_x64::op_divu }, // DIVU dst,edst,src1,src2[,f]
{ uml::OP_DIVS, &drcbe_x64::op_divs }, // DIVS dst,edst,src1,src2[,f]
{ uml::OP_AND, &drcbe_x64::op_and }, // AND dst,src1,src2[,f]
{ uml::OP_TEST, &drcbe_x64::op_test }, // TEST src1,src2[,f]
{ uml::OP_OR, &drcbe_x64::op_or }, // OR dst,src1,src2[,f]
{ uml::OP_XOR, &drcbe_x64::op_xor }, // XOR dst,src1,src2[,f]
{ uml::OP_LZCNT, &drcbe_x64::op_lzcnt }, // LZCNT dst,src[,f]
{ uml::OP_TZCNT, &drcbe_x64::op_tzcnt }, // TZCNT dst,src[,f]
{ uml::OP_BSWAP, &drcbe_x64::op_bswap }, // BSWAP dst,src
{ uml::OP_SHL, &drcbe_x64::op_shift<Inst::kIdShl> }, // SHL dst,src,count[,f]
{ uml::OP_SHR, &drcbe_x64::op_shift<Inst::kIdShr> }, // SHR dst,src,count[,f]
{ uml::OP_SAR, &drcbe_x64::op_shift<Inst::kIdSar> }, // SAR dst,src,count[,f]
{ uml::OP_ROL, &drcbe_x64::op_shift<Inst::kIdRol> }, // ROL dst,src,count[,f]
{ uml::OP_ROLC, &drcbe_x64::op_shift<Inst::kIdRcl> }, // ROLC dst,src,count[,f]
{ uml::OP_ROR, &drcbe_x64::op_shift<Inst::kIdRor> }, // ROR dst,src,count[,f]
{ uml::OP_RORC, &drcbe_x64::op_shift<Inst::kIdRcr> }, // RORC dst,src,count[,f]
// Floating Point Operations
{ uml::OP_FLOAD, &drcbe_x64::op_fload }, // FLOAD dst,base,index
{ uml::OP_FSTORE, &drcbe_x64::op_fstore }, // FSTORE base,index,src
{ uml::OP_FREAD, &drcbe_x64::op_fread }, // FREAD dst,space,src1
{ uml::OP_FWRITE, &drcbe_x64::op_fwrite }, // FWRITE space,dst,src1
{ uml::OP_FMOV, &drcbe_x64::op_fmov }, // FMOV dst,src1[,c]
{ uml::OP_FTOINT, &drcbe_x64::op_ftoint }, // FTOINT dst,src1,size,round
{ uml::OP_FFRINT, &drcbe_x64::op_ffrint }, // FFRINT dst,src1,size
{ uml::OP_FFRFLT, &drcbe_x64::op_ffrflt }, // FFRFLT dst,src1,size
{ uml::OP_FRNDS, &drcbe_x64::op_frnds }, // FRNDS dst,src1
{ uml::OP_FADD, &drcbe_x64::op_fadd }, // FADD dst,src1,src2
{ uml::OP_FSUB, &drcbe_x64::op_fsub }, // FSUB dst,src1,src2
{ uml::OP_FCMP, &drcbe_x64::op_fcmp }, // FCMP src1,src2
{ uml::OP_FMUL, &drcbe_x64::op_fmul }, // FMUL dst,src1,src2
{ uml::OP_FDIV, &drcbe_x64::op_fdiv }, // FDIV dst,src1,src2
{ uml::OP_FNEG, &drcbe_x64::op_fneg }, // FNEG dst,src1
{ uml::OP_FABS, &drcbe_x64::op_fabs }, // FABS dst,src1
{ uml::OP_FSQRT, &drcbe_x64::op_fsqrt }, // FSQRT dst,src1
{ uml::OP_FRECIP, &drcbe_x64::op_frecip }, // FRECIP dst,src1
{ uml::OP_FRSQRT, &drcbe_x64::op_frsqrt }, // FRSQRT dst,src1
{ uml::OP_FCOPYI, &drcbe_x64::op_fcopyi }, // FCOPYI dst,src
{ uml::OP_ICOPYF, &drcbe_x64::op_icopyf } // ICOPYF dst,src
};
class ThrowableErrorHandler : public ErrorHandler
{
public:
void handleError(Error err, const char *message, BaseEmitter *origin) override
{
throw emu_fatalerror("asmjit error %d: %s", err, message);
}
};
//**************************************************************************
// INLINE FUNCTIONS
//**************************************************************************
//-------------------------------------------------
// param_normalize - convert a full parameter
// into a reduced set
//-------------------------------------------------
drcbe_x64::be_parameter::be_parameter(drcbe_x64 &drcbe, const parameter ¶m, uint32_t allowed)
{
int regnum;
switch (param.type())
{
// immediates pass through
case parameter::PTYPE_IMMEDIATE:
assert(allowed & PTYPE_I);
*this = param.immediate();
break;
// memory passes through
case parameter::PTYPE_MEMORY:
assert(allowed & PTYPE_M);
*this = make_memory(param.memory());
break;
// if a register maps to a register, keep it as a register; otherwise map it to memory
case parameter::PTYPE_INT_REGISTER:
assert(allowed & PTYPE_R);
assert(allowed & PTYPE_M);
regnum = int_register_map[param.ireg() - REG_I0];
if (regnum != 0)
*this = make_ireg(regnum);
else
*this = make_memory(&drcbe.m_state.r[param.ireg() - REG_I0]);
break;
// if a register maps to a register, keep it as a register; otherwise map it to memory
case parameter::PTYPE_FLOAT_REGISTER:
assert(allowed & PTYPE_F);
assert(allowed & PTYPE_M);
regnum = float_register_map[param.freg() - REG_F0];
if (regnum != 0)
*this = make_freg(regnum);
else
*this = make_memory(&drcbe.m_state.f[param.freg() - REG_F0]);
break;
// everything else is unexpected
default:
fatalerror("Unexpected parameter type\n");
}
}
//-------------------------------------------------
// select_register - select a register to use,
// avoiding conflicts with the optional
// checkparam
//-------------------------------------------------
inline Gp drcbe_x64::be_parameter::select_register(Gp defreg) const
{
if (m_type == PTYPE_INT_REGISTER)
return Gp(defreg, m_value);
return defreg;
}
inline Xmm drcbe_x64::be_parameter::select_register(Xmm defreg) const
{
if (m_type == PTYPE_FLOAT_REGISTER)
return Xmm(m_value);
return defreg;
}
Gp drcbe_x64::be_parameter::select_register(Gp defreg, be_parameter const &checkparam) const
{
if (*this == checkparam)
return defreg;
return select_register(defreg);
}
Gp drcbe_x64::be_parameter::select_register(Gp defreg, be_parameter const &checkparam, be_parameter const &checkparam2) const
{
if (*this == checkparam || *this == checkparam2)
return defreg;
return select_register(defreg);
}
Xmm drcbe_x64::be_parameter::select_register(Xmm defreg, be_parameter const &checkparam) const
{
if (*this == checkparam)
return defreg;
return select_register(defreg);
}
//-------------------------------------------------
// select_register - select a register to use,
// avoiding conflicts with the optional
// checkparam
//-------------------------------------------------
inline void drcbe_x64::normalize_commutative(be_parameter &inner, be_parameter &outer)
{
// if the inner parameter is a memory operand, push it to the outer
if (inner.is_memory())
{
be_parameter temp = inner;
inner = outer;
outer = temp;
}
// if the inner parameter is an immediate, push it to the outer
if (inner.is_immediate())
{
be_parameter temp = inner;
inner = outer;
outer = temp;
}
}
//-------------------------------------------------
// offset_from_rbp - return the verified offset
// from rbp
//-------------------------------------------------
inline int32_t drcbe_x64::offset_from_rbp(const void *ptr) const
{
const int64_t delta = reinterpret_cast<const uint8_t *>(ptr) - m_rbpvalue;
if (int32_t(delta) != delta)
throw emu_fatalerror("drcbe_x64::offset_from_rbp: delta out of range");
return int32_t(delta);
}
//-------------------------------------------------
// get_base_register_and_offset - determine right
// base register and offset to access the given
// target address
//-------------------------------------------------
inline Gp drcbe_x64::get_base_register_and_offset(Assembler &a, void *target, Gp const ®, int32_t &offset)
{
const int64_t delta = reinterpret_cast<uint8_t *>(target) - m_rbpvalue;
if (short_immediate(delta))
{
offset = delta;
return rbp;
}
else
{
offset = 0;
mov_r64_imm(a, reg, uintptr_t(target)); // mov reg,target
return reg;
}
}
//-------------------------------------------------
// smart_call_r64 - generate a call either
// directly or via a call through pointer
//-------------------------------------------------
inline void drcbe_x64::smart_call_r64(Assembler &a, x86code *target, Gp const ®)
{
const int64_t delta = target - (x86code *)(a.code()->baseAddress() + a.offset() + 5);
if (short_immediate(delta))
a.call(imm(target)); // call target
else
{
mov_r64_imm(a, reg, uintptr_t(target)); // mov reg,target
a.call(reg); // call reg
}
}
//-------------------------------------------------
// smart_call_m64 - generate a call either
// directly or via a call through pointer
//-------------------------------------------------
inline void drcbe_x64::smart_call_m64(Assembler &a, x86code **target)
{
const int64_t delta = *target - (x86code *)(a.code()->baseAddress() + a.offset() + 5);
if (short_immediate(delta))
a.call(imm(*target)); // call *target
else
a.call(MABS(target)); // call [target]
}
//**************************************************************************
// BACKEND CALLBACKS
//**************************************************************************
//-------------------------------------------------
// drcbe_x64 - constructor
//-------------------------------------------------
drcbe_x64::drcbe_x64(drcuml_state &drcuml, device_t &device, drc_cache &cache, uint32_t flags, int modes, int addrbits, int ignorebits)
: drcbe_interface(drcuml, cache, device)
, m_hash(cache, modes, addrbits, ignorebits)
, m_map(cache, 0xaaaaaaaa5555)
, m_log(nullptr)
, m_log_asmjit(nullptr)
, m_absmask32((uint32_t *)cache.alloc_near(16*2 + 15))
, m_absmask64(nullptr)
, m_rbpvalue(cache.near() + 0x80)
, m_entry(nullptr)
, m_exit(nullptr)
, m_nocode(nullptr)
, m_near(*(near_state *)cache.alloc_near(sizeof(m_near)))
{
// build up necessary arrays
static const uint32_t sse_control[4] =
{
0xff80, // ROUND_TRUNC
0x9f80, // ROUND_ROUND
0xdf80, // ROUND_CEIL
0xbf80 // ROUND_FLOOR
};
memcpy(m_near.ssecontrol, sse_control, sizeof(m_near.ssecontrol));
m_near.single1 = 1.0f;
m_near.double1 = 1.0;
// create absolute value masks that are aligned to SSE boundaries
m_absmask32 = (uint32_t *)(((uintptr_t)m_absmask32 + 15) & ~15);
m_absmask32[0] = m_absmask32[1] = m_absmask32[2] = m_absmask32[3] = 0x7fffffff;
m_absmask64 = (uint64_t *)&m_absmask32[4];
m_absmask64[0] = m_absmask64[1] = 0x7fffffffffffffffU;
// get pointers to C functions we need to call
using debugger_hook_func = void (*)(device_debug *, offs_t);
static const debugger_hook_func debugger_inst_hook = [] (device_debug *dbg, offs_t pc) { dbg->instruction_hook(pc); }; // TODO: kill trampoline if possible
m_near.debug_cpu_instruction_hook = (x86code *)debugger_inst_hook;
if (LOG_HASHJMPS)
{
m_near.debug_log_hashjmp = (x86code *)debug_log_hashjmp;
m_near.debug_log_hashjmp_fail = (x86code *)debug_log_hashjmp_fail;
}
m_near.drcmap_get_value = (x86code *)&drc_map_variables::static_get_value;
// build the flags map
for (int entry = 0; entry < std::size(m_near.flagsmap); entry++)
{
uint8_t flags = 0;
if (entry & 0x001) flags |= FLAG_C;
if (entry & 0x004) flags |= FLAG_U;
if (entry & 0x040) flags |= FLAG_Z;
if (entry & 0x080) flags |= FLAG_S;
if (entry & 0x800) flags |= FLAG_V;
m_near.flagsmap[entry] = flags;
}
for (int entry = 0; entry < std::size(m_near.flagsunmap); entry++)
{
uint64_t flags = 0;
if (entry & FLAG_C) flags |= 0x001;
if (entry & FLAG_U) flags |= 0x004;
if (entry & FLAG_Z) flags |= 0x040;
if (entry & FLAG_S) flags |= 0x080;
if (entry & FLAG_V) flags |= 0x800;
m_near.flagsunmap[entry] = flags;
}
// resolve the actual addresses of the address space handlers
auto const resolve_accessor =
[] (resolved_handler &handler, address_space &space, auto accessor)
{
if (MAME_DELEGATE_USE_TYPE == MAME_DELEGATE_TYPE_ITANIUM)
{
struct { uintptr_t ptr; ptrdiff_t adj; } equiv;
assert(sizeof(accessor) == sizeof(equiv));
*reinterpret_cast<decltype(accessor) *>(&equiv) = accessor;
handler.obj = uintptr_t(reinterpret_cast<u8 *>(&space) + equiv.adj);
if (BIT(equiv.ptr, 0))
{
auto const vptr = *reinterpret_cast<u8 const *const *>(handler.obj) + equiv.ptr - 1;
handler.func = *reinterpret_cast<x86code *const *>(vptr);
}
else
{
handler.func = reinterpret_cast<x86code *>(equiv.ptr);
}
}
else if (MAME_DELEGATE_USE_TYPE == MAME_DELEGATE_TYPE_MSVC)
{
// interpret the pointer to member function ignoring the virtual inheritance variant
struct single { uintptr_t ptr; };
struct multi { uintptr_t ptr; int adj; };
struct { uintptr_t ptr; int adj; int vadj; int vindex; } unknown;
assert(sizeof(accessor) <= sizeof(unknown));
*reinterpret_cast<decltype(accessor) *>(&unknown) = accessor;
handler.func = reinterpret_cast<x86code *>(unknown.ptr);
handler.obj = uintptr_t(&space);
if ((sizeof(unknown) == sizeof(accessor)) && unknown.vindex)
{
handler.obj += unknown.vadj;
auto const vptr = *reinterpret_cast<std::uint8_t const *const *>(handler.obj);
handler.obj += *reinterpret_cast<int const *>(vptr + unknown.vindex);
}
if (sizeof(single) < sizeof(accessor))
handler.obj += unknown.adj;
// walk past thunks
while (true)
{
if (0xe9 == handler.func[0])
{
// absolute jump with 32-bit displacement
handler.func += 5 + *reinterpret_cast<s32 const *>(handler.func + 1);
}
else if ((0x48 == handler.func[0]) && (0x8b == handler.func[1]) && (0x01 == handler.func[2]) && (0xff == handler.func[3]) && ((0x60 == handler.func[4]) || (0xa0 == handler.func[4])))
{
// virtual function call thunk
auto const vptr = *reinterpret_cast<std::uint8_t const *const *>(handler.obj);
if (0x60 == handler.func[4])
handler.func = *reinterpret_cast<x86code *const *>(vptr + *reinterpret_cast<s8 const *>(handler.func + 5));
else
handler.func = *reinterpret_cast<x86code *const *>(vptr + *reinterpret_cast<s32 const *>(handler.func + 5));
}
else
{
// not something we can easily bypass
break;
}
}
}
};
m_resolved_accessors.resize(m_space.size());
for (int space = 0; m_space.size() > space; ++space)
{
if (m_space[space])
{
resolve_accessor(m_resolved_accessors[space].read_byte, *m_space[space], static_cast<u8 (address_space::*)(offs_t) >(&address_space::read_byte));
resolve_accessor(m_resolved_accessors[space].read_word, *m_space[space], static_cast<u16 (address_space::*)(offs_t) >(&address_space::read_word));
resolve_accessor(m_resolved_accessors[space].read_word_masked, *m_space[space], static_cast<u16 (address_space::*)(offs_t, u16)>(&address_space::read_word));
resolve_accessor(m_resolved_accessors[space].read_dword, *m_space[space], static_cast<u32 (address_space::*)(offs_t) >(&address_space::read_dword));
resolve_accessor(m_resolved_accessors[space].read_dword_masked, *m_space[space], static_cast<u32 (address_space::*)(offs_t, u32)>(&address_space::read_dword));
resolve_accessor(m_resolved_accessors[space].read_qword, *m_space[space], static_cast<u64 (address_space::*)(offs_t) >(&address_space::read_qword));
resolve_accessor(m_resolved_accessors[space].read_qword_masked, *m_space[space], static_cast<u64 (address_space::*)(offs_t, u64)>(&address_space::read_qword));
resolve_accessor(m_resolved_accessors[space].write_byte, *m_space[space], static_cast<void (address_space::*)(offs_t, u8) >(&address_space::write_byte));
resolve_accessor(m_resolved_accessors[space].write_word, *m_space[space], static_cast<void (address_space::*)(offs_t, u16) >(&address_space::write_word));
resolve_accessor(m_resolved_accessors[space].write_word_masked, *m_space[space], static_cast<void (address_space::*)(offs_t, u16, u16)>(&address_space::write_word));
resolve_accessor(m_resolved_accessors[space].write_dword, *m_space[space], static_cast<void (address_space::*)(offs_t, u32) >(&address_space::write_dword));
resolve_accessor(m_resolved_accessors[space].write_dword_masked, *m_space[space], static_cast<void (address_space::*)(offs_t, u32, u32)>(&address_space::write_dword));
resolve_accessor(m_resolved_accessors[space].write_qword, *m_space[space], static_cast<void (address_space::*)(offs_t, u64) >(&address_space::write_qword));
resolve_accessor(m_resolved_accessors[space].write_qword_masked, *m_space[space], static_cast<void (address_space::*)(offs_t, u64, u64)>(&address_space::write_qword));
}
}
// build the opcode table (static but it doesn't hurt to regenerate it)
for (auto & elem : s_opcode_table_source)
s_opcode_table[elem.opcode] = elem.func;
// create the log
if (device.machine().options().drc_log_native())
{
std::string filename = std::string("drcbex64_").append(device.shortname()).append(".asm");
m_log = x86log_create_context(filename.c_str());
m_log_asmjit = fopen(std::string("drcbex64_asmjit_").append(device.shortname()).append(".asm").c_str(), "w");
}
}
//-------------------------------------------------
// ~drcbe_x64 - destructor
//-------------------------------------------------
drcbe_x64::~drcbe_x64()
{
// free the log context
if (m_log != nullptr)
x86log_free_context(m_log);
if (m_log_asmjit)
fclose(m_log_asmjit);
}
size_t drcbe_x64::emit(CodeHolder &ch)
{
Error err;
// the following three calls aren't currently required, but may be if
// other asmjist features are used in future
if (false)
{
err = ch.flatten();
if (err)
throw emu_fatalerror("asmjit::CodeHolder::flatten() error %d", err);
err = ch.resolveUnresolvedLinks();
if (err)
throw emu_fatalerror("asmjit::CodeHolder::resolveUnresolvedLinks() error %d", err);
err = ch.relocateToBase(ch.baseAddress());
if (err)
throw emu_fatalerror("asmjit::CodeHolder::relocateToBase() error %d", err);
}
size_t const alignment = ch.baseAddress() - uint64_t(m_cache.top());
size_t const code_size = ch.codeSize();
// test if enough room remains in drc cache
drccodeptr *cachetop = m_cache.begin_codegen(alignment + code_size);
if (cachetop == nullptr)
return 0;
err = ch.copyFlattenedData(drccodeptr(ch.baseAddress()), code_size, CopySectionFlags::kPadTargetBuffer);
if (err)
throw emu_fatalerror("asmjit::CodeHolder::copyFlattenedData() error %d", err);
// update the drc cache and end codegen
*cachetop += alignment + code_size;
m_cache.end_codegen();
return code_size;
}
//-------------------------------------------------
// reset - reset back-end specific state
//-------------------------------------------------
void drcbe_x64::reset()
{
// output a note to the log
if (m_log != nullptr)
x86log_printf(m_log, "%s", "\n\n===========\nCACHE RESET\n===========\n\n");
// generate a little bit of glue code to set up the environment
x86code *dst = (x86code *)m_cache.top();
CodeHolder ch;
ch.init(Environment::host(), uint64_t(dst));
FileLogger logger(m_log_asmjit);
if (logger.file())
{
logger.setFlags(FormatFlags::kHexOffsets | FormatFlags::kHexImms | FormatFlags::kMachineCode);
logger.setIndentation(FormatIndentationGroup::kCode, 4);
ch.setLogger(&logger);
}
Assembler a(&ch);
if (logger.file())
a.addDiagnosticOptions(DiagnosticOptions::kValidateIntermediate);
// generate an entry point
m_entry = (x86_entry_point_func)dst;
a.bind(a.newNamedLabel("entry_point"));
FuncDetail entry_point;
entry_point.init(FuncSignature::build<uint32_t, uint8_t *, x86code *>(CallConvId::kHost), Environment::host());
FuncFrame frame;
frame.init(entry_point);
frame.addDirtyRegs(rbx, rbp, rsi, rdi, r12, r13, r14, r15);
FuncArgsAssignment args(&entry_point);
args.assignAll(rbp);
args.updateFuncFrame(frame);
frame.finalize();
a.emitProlog(frame);
a.emitArgsAssignment(frame, args);
a.sub(rsp, 32);
a.mov(MABS(&m_near.hashstacksave), rsp);
a.sub(rsp, 8);
a.mov(MABS(&m_near.stacksave), rsp);
a.stmxcsr(MABS(&m_near.ssemode));
a.jmp(Gpq(REG_PARAM2));
// generate an exit point
m_exit = dst + a.offset();
a.bind(a.newNamedLabel("exit_point"));
a.ldmxcsr(MABS(&m_near.ssemode));
a.mov(rsp, MABS(&m_near.hashstacksave));
a.add(rsp, 32);
a.emitEpilog(frame);
// generate a no code point
m_nocode = dst + a.offset();
a.bind(a.newNamedLabel("nocode_point"));
a.ret();
// emit the generated code
size_t bytes = emit(ch);
if (m_log != nullptr)
{
x86log_disasm_code_range(m_log, "entry_point", dst, m_exit);
x86log_disasm_code_range(m_log, "exit_point", m_exit, m_nocode);
x86log_disasm_code_range(m_log, "nocode_point", m_nocode, dst + bytes);
}
// reset our hash tables
m_hash.reset();
m_hash.set_default_codeptr(m_nocode);
}
//-------------------------------------------------
// execute - execute a block of code referenced
// by the given handle
//-------------------------------------------------
int drcbe_x64::execute(code_handle &entry)
{
// call our entry point which will jump to the destination
m_cache.codegen_complete();
return (*m_entry)(m_rbpvalue, (x86code *)entry.codeptr());
}
//-------------------------------------------------
// drcbex64_generate - generate code
//-------------------------------------------------
void drcbe_x64::generate(drcuml_block &block, const instruction *instlist, uint32_t numinst)
{
// tell all of our utility objects that a block is beginning
m_hash.block_begin(block, instlist, numinst);
m_map.block_begin(block);
// compute the base by aligning the cache top to a cache line (assumed to be 64 bytes)
x86code *dst = (x86code *)(uint64_t(m_cache.top() + 63) & ~63);
CodeHolder ch;
ch.init(Environment::host(), uint64_t(dst));
ThrowableErrorHandler e;
ch.setErrorHandler(&e);
FileLogger logger(m_log_asmjit);
if (logger.file())
{
logger.setFlags(FormatFlags::kHexOffsets | FormatFlags::kHexImms | FormatFlags::kMachineCode);
logger.setIndentation(FormatIndentationGroup::kCode, 4);
ch.setLogger(&logger);
}
Assembler a(&ch);
if (logger.file())
a.addDiagnosticOptions(DiagnosticOptions::kValidateIntermediate);
// generate code
std::string blockname;
for (int inum = 0; inum < numinst; inum++)
{
const instruction &inst = instlist[inum];
assert(inst.opcode() < std::size(s_opcode_table));
// must remain in scope until output
std::string dasm;
// add a comment
if (m_log != nullptr)
{
dasm = inst.disasm(&m_drcuml);
x86log_add_comment(m_log, dst + a.offset(), "%s", dasm.c_str());
a.setInlineComment(dasm.c_str());
}
// extract a blockname
if (blockname.empty())
{
if (inst.opcode() == OP_HANDLE)
blockname = inst.param(0).handle().string();
else if (inst.opcode() == OP_HASH)
blockname = string_format("Code: mode=%d PC=%08X", (uint32_t)inst.param(0).immediate(), (offs_t)inst.param(1).immediate());
}
// generate code
(this->*s_opcode_table[inst.opcode()])(a, inst);
}
// emit the generated code
size_t const bytes = emit(ch);
if (!bytes)
block.abort();