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heathkit/h89.cpp: Add SigmaSoft Interactive Graphics Controller (#11801)
* Add slot devices for the IGC with compatible ROMs * Add Ultimeth 2k ROM as an option for Sigmasoft clone
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// license:BSD-3-Clause | ||
// copyright-holders:Mark Garlanger | ||
/*************************************************************************** | ||
SigmaSoft Universal Parallel Interface Board | ||
****************************************************************************/ | ||
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#include "emu.h" | ||
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#include "sigmasoft_parallel_port.h" | ||
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// | ||
// Logging defines | ||
// | ||
#define LOG_REG (1U << 1) // Shows register setup | ||
#define LOG_FUNC (1U << 2) // Function calls | ||
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#define VERBOSE (0) | ||
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#include "logmacro.h" | ||
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#define LOGREG(...) LOGMASKED(LOG_REG, __VA_ARGS__) | ||
#define LOGFUNC(...) LOGMASKED(LOG_FUNC, __VA_ARGS__) | ||
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#ifdef _MSC_VER | ||
#define FUNCNAME __func__ | ||
#else | ||
#define FUNCNAME __PRETTY_FUNCTION__ | ||
#endif | ||
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DEFINE_DEVICE_TYPE(SIGMASOFT_PARALLEL_PORT, sigmasoft_parallel_port, "sigmasoft_parallel_port", "SigmaSoft Universal Parallel Board"); | ||
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sigmasoft_parallel_port::sigmasoft_parallel_port(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock): | ||
device_t(mconfig, SIGMASOFT_PARALLEL_PORT, tag, owner, clock), | ||
m_ctrl_r(*this, 0x00), | ||
m_video_mem_r(*this, 0x00), | ||
m_video_mem_w(*this), | ||
m_io_lo_addr(*this), | ||
m_io_hi_addr(*this), | ||
m_window_lo_addr(*this), | ||
m_window_hi_addr(*this), | ||
m_ctrl_w(*this) | ||
{ | ||
} | ||
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void sigmasoft_parallel_port::video_mem_w(uint8_t val) | ||
{ | ||
m_video_mem_w(val); | ||
} | ||
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void sigmasoft_parallel_port::io_lo_addr_w(uint8_t val) | ||
{ | ||
m_io_lo_addr(val); | ||
} | ||
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void sigmasoft_parallel_port::io_hi_addr_w(uint8_t val) | ||
{ | ||
m_io_hi_addr(val); | ||
} | ||
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void sigmasoft_parallel_port::window_lo_addr_w(uint8_t val) | ||
{ | ||
m_window_lo_addr(val); | ||
} | ||
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void sigmasoft_parallel_port::window_hi_addr_w(uint8_t val) | ||
{ | ||
m_window_hi_addr(val); | ||
} | ||
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void sigmasoft_parallel_port::ctrl_w(uint8_t val) | ||
{ | ||
m_ctrl_w(val); | ||
} | ||
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void sigmasoft_parallel_port::write(offs_t reg, uint8_t val) | ||
{ | ||
LOGFUNC("%s: reg: %d val: %d\n", FUNCNAME, reg, val); | ||
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switch (reg) | ||
{ | ||
case 0: | ||
video_mem_w(val); | ||
break; | ||
case 1: | ||
io_lo_addr_w(val); | ||
break; | ||
case 2: | ||
io_hi_addr_w(val); | ||
break; | ||
case 3: | ||
window_lo_addr_w(val); | ||
break; | ||
case 4: | ||
window_hi_addr_w(val); | ||
break; | ||
case 5: | ||
ctrl_w(val); | ||
break; | ||
case 6: | ||
// TODO - Centronics interface | ||
break; | ||
case 7: | ||
// TODO - Centronics interface | ||
break; | ||
} | ||
} | ||
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uint8_t sigmasoft_parallel_port::video_mem_r() | ||
{ | ||
// get video memory value from igc device | ||
return m_video_mem_r(); | ||
} | ||
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uint8_t sigmasoft_parallel_port::ctrl_r() | ||
{ | ||
// get control register from igc device | ||
return m_ctrl_r(); | ||
} | ||
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uint8_t sigmasoft_parallel_port::read(offs_t reg) | ||
{ | ||
// default return for the h89 | ||
uint8_t value = 0xff; | ||
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switch (reg) | ||
{ | ||
case 0: | ||
value = video_mem_r(); | ||
break; | ||
case 1: | ||
// TODO - Light Pen Low address | ||
break; | ||
case 2: | ||
// TODO - Light Pen High address | ||
break; | ||
case 3: | ||
// TODO - Left input device | ||
break; | ||
case 4: | ||
// TODO - Right input device | ||
break; | ||
case 5: | ||
// Control Register | ||
value = ctrl_r(); | ||
break; | ||
case 6: | ||
// TODO - Centronics interface | ||
break; | ||
case 7: | ||
// TODO - Centronics interface | ||
break; | ||
} | ||
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LOGFUNC("%s: reg: %d val: %d\n", FUNCNAME, reg, value); | ||
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return value; | ||
} | ||
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void sigmasoft_parallel_port::device_start() | ||
{ | ||
} |
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// license:BSD-3-Clause | ||
// copyright-holders:Mark Garlanger | ||
/*************************************************************************** | ||
SigmaSoft Universal Parallel Interface Board | ||
****************************************************************************/ | ||
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#ifndef MAME_HEATHKIT_SIGMASOFT_PARALLEL_PORT_H | ||
#define MAME_HEATHKIT_SIGMASOFT_PARALLEL_PORT_H | ||
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#pragma once | ||
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class sigmasoft_parallel_port : public device_t | ||
{ | ||
public: | ||
sigmasoft_parallel_port(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0); | ||
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void write(offs_t reg, uint8_t val); | ||
uint8_t read(offs_t reg); | ||
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auto ctrl_r_cb() { return m_ctrl_r.bind(); } | ||
auto video_mem_r_cb() { return m_video_mem_r.bind(); } | ||
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auto video_mem_cb() { return m_video_mem_w.bind(); } | ||
auto io_lo_cb() { return m_io_lo_addr.bind(); } | ||
auto io_hi_cb() { return m_io_hi_addr.bind(); } | ||
auto window_lo_cb() { return m_window_lo_addr.bind(); } | ||
auto window_hi_cb() { return m_window_hi_addr.bind(); } | ||
auto ctrl_cb() { return m_ctrl_w.bind(); } | ||
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protected: | ||
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virtual void device_start() override; | ||
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uint8_t video_mem_r(); | ||
void video_mem_w(uint8_t val); | ||
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void io_lo_addr_w(uint8_t val); | ||
void io_hi_addr_w(uint8_t val); | ||
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void window_lo_addr_w(uint8_t val); | ||
void window_hi_addr_w(uint8_t val); | ||
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void ctrl_w(uint8_t val); | ||
uint8_t ctrl_r(); | ||
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private: | ||
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// Reads | ||
devcb_read8 m_ctrl_r; | ||
devcb_read8 m_video_mem_r; | ||
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// Writes | ||
devcb_write8 m_video_mem_w; | ||
devcb_write8 m_io_lo_addr; | ||
devcb_write8 m_io_hi_addr; | ||
devcb_write8 m_window_lo_addr; | ||
devcb_write8 m_window_hi_addr; | ||
devcb_write8 m_ctrl_w; | ||
}; | ||
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DECLARE_DEVICE_TYPE(SIGMASOFT_PARALLEL_PORT, sigmasoft_parallel_port) | ||
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#endif // MAME_HEATHKIT_SIGMASOFT_PARALLEL_PORT_H |
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