cpu/z80/z80.cpp: More accurate emulation of WZ in I/O block instructions #11812
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Luigi30
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Dec 16, 2023
The inir, indr, otir and otdr instructions modify WZ when updating PC when the repeat condition is met.
einstein95
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Mar 2, 2024
The inir, indr, otir and otdr instructions modify WZ when updating PC when the repeat condition is met.
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Credits
Description
This tiny PR adds emulation of a recently discovered undocumented behavior of the
inir/indr/otir/otdrinstructions:As in
cpir/cpdr/ldir/lddr, when the repeat condition is met, the Z80 CPU generates an extra M-cycle of 5 T-states to decrement PC. This M-cycle performs additional flag changes (discovered and cracked by David Banks), but until now it was not known that the WZ register is also modified, being set, as in all other block instructions during this M-cycle, to PCi + 1 (PCi = value of PC at the start of the instruction, before it is incremented).Testing
As can be checked in the links provided below, this behavior has been verified on real hardware and in electronic simulations. It has been tested on 1 Zilog NMOS and 2 NEC NMOS processors. Also, the most important and so far only test suite capable of partially detecting this behavior has been updated accordingly.
References
INIR->NOP'/INDR->NOP'for z80memptr. raxoft/z80test#3