cpu/t11: Improve trace trap processing; add basic interrupt processing to the K1801VM1. #12151
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…g to the K1801VM1.
cuavas
reviewed
Mar 18, 2024
src/devices/cpu/t11/t11.cpp
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| m_mcir = MCIR_IRQ; | ||
| m_vsel = VM1_IRQ3; | ||
| } | ||
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| // 12. nVIRQ pin; PSW7, PSW10 | ||
| else if (m_vec_active && !GET_I) | ||
| { | ||
| int vec = m_in_iack_func(0); | ||
| if (vec == -1 || vec == 0) |
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Please don’t leave blank lines between the end of an if block and a following else – it greatly increases the risk of confusion when reading the code.
src/devices/cpu/t11/t11.h
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| int m_mcir; | ||
| uint16_t m_vsel; |
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It appears that m_mcir and m_vsel are supposed to remain valid when returning to the scheduler. Should they be included in save states?
Also, things included in save states need to use explicitly sized types for portability (int is not explicitly sized).
rb6502
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…g to the K1801VM1.