Optimistic PR placeholders :)

src/cpu/ops/common.rs

@@ -526,6 +526,53 @@ pub fn cmp_32(core: &mut Core, dst: u32, src: u32) -> u32 {
     res32
 }
 
+// Put common implementation of DBcc here
+// Put common implementation of DIVS here
+// Put common implementation of DIVU here
+// Put common implementation of EOR here
+// Put common implementation of EORI here
+// Put common implementation of EORI to CCR here
+// Put common implementation of EORI to SR here
+// Put common implementation of EXG here
+// Put common implementation of EXT here
+// Put common implementation of ILLEGAL here
+// Put common implementation of JMP here
+// Put common implementation of JSR here
+// Put common implementation of LEA here
+// Put common implementation of LINK here
+// Put common implementation of LSL, LSR here
+// Put common implementation of MOVE here
+// Put common implementation of MOVEA here
+// Put common implementation of MOVE to CCR here
+// Put common implementation of MOVE from SR here
+// Put common implementation of MOVE to SR here
+// Put common implementation of MOVE USP here
+// Put common implementation of MOVEM here
+// Put common implementation of MOVEP here
+// Put common implementation of MOVEQ here
+// Put common implementation of MULS here
+// Put common implementation of MULU here
+// Put common implementation of NBCD here
+// Put common implementation of NEG here
+// Put common implementation of NEGX here
+// Put common implementation of NOP here
+// Put common implementation of NOT here
+// Put common implementation of OR here
+// Put common implementation of ORI here
+// Put common implementation of ORI to CCR here
+// Put common implementation of ORI to SR here
+// Put common implementation of PEA here
+// Put common implementation of RESET here
+// Put common implementation of ROL, ROR here
+// Put common implementation of ROXL, ROXR here
+// Put common implementation of RTE here
+// Put common implementation of RTR here
+// Put common implementation of RTS here
+// Put common implementation of SBCD here
+// Put common implementation of Scc here
+// Put common implementation of STOP here
+// Put common implementation of SUB here
+
 pub fn sub_8(core: &mut Core, dst: u32, src: u32) -> u32 {
     let dst = mask_out_above_8!(dst);
     let src = mask_out_above_8!(src);
@@ -582,7 +629,12 @@ pub fn sub_32(core: &mut Core, dst: u32, src: u32) -> u32 {
     res32
 }
 
-
+// Put common implementation of SWAP here
+// Put common implementation of TAS here
+// Put common implementation of TRAP here
+// Put common implementation of TRAPV here
+// Put common implementation of TST here
+// Put common implementation of UNLK here
 
 #[cfg(test)]
 mod tests {

src/cpu/ops/handlers.rs

@@ -610,6 +610,53 @@ pub const OP_CMPM_8        : u32 = OP_CMPM | BYTE_SIZED | MM_MODE;
 pub const OP_CMPM_16       : u32 = OP_CMPM | WORD_SIZED | MM_MODE;
 pub const OP_CMPM_32       : u32 = OP_CMPM | LONG_SIZED | MM_MODE;
 
+// Put constants for DBcc here
+// Put constants for DIVS here
+// Put constants for DIVU here
+// Put constants for EOR here
+// Put constants for EORI here
+// Put constants for EORI to CCR here
+// Put constants for EORI to SR here
+// Put constants for EXG here
+// Put constants for EXT here
+// Put constants for ILLEGAL here
+// Put constants for JMP here
+// Put constants for JSR here
+// Put constants for LEA here
+// Put constants for LINK here
+// Put constants for LSL, LSR here
+// Put constants for MOVE here
+// Put constants for MOVEA here
+// Put constants for MOVE to CCR here
+// Put constants for MOVE from SR here
+// Put constants for MOVE to SR here
+// Put constants for MOVE USP here
+// Put constants for MOVEM here
+// Put constants for MOVEP here
+// Put constants for MOVEQ here
+// Put constants for MULS here
+// Put constants for MULU here
+// Put constants for NBCD here
+// Put constants for NEG here
+// Put constants for NEGX here
+// Put constants for NOP here
+// Put constants for NOT here
+// Put constants for OR here
+// Put constants for ORI here
+// Put constants for ORI to CCR here
+// Put constants for ORI to SR here
+// Put constants for PEA here
+// Put constants for RESET here
+// Put constants for ROL, ROR here
+// Put constants for ROXL, ROXR here
+// Put constants for RTE here
+// Put constants for RTR here
+// Put constants for RTS here
+// Put constants for SBCD here
+// Put constants for Scc here
+// Put constants for STOP here
+// Put constants for SUB here
+
 pub const OP_SUB_8_ER_DN   : u32 = OP_SUB | BYTE_SIZED | DEST_DX | OPER_DN;
 pub const OP_SUB_8_ER_AI   : u32 = OP_SUB | BYTE_SIZED | DEST_DX | OPER_AI;
 pub const OP_SUB_8_ER_PI   : u32 = OP_SUB | BYTE_SIZED | DEST_DX | OPER_PI;
@@ -725,6 +772,13 @@ pub const OP_SUBI_32_IX    : u32 = OP_SUBI | LONG_SIZED | OPER_IX;
 pub const OP_SUBI_32_AW    : u32 = OP_SUBI | LONG_SIZED | OPER_AW;
 pub const OP_SUBI_32_AL    : u32 = OP_SUBI | LONG_SIZED | OPER_AL;
 
+// Put constants for SWAP here
+// Put constants for TAS here
+// Put constants for TRAP here
+// Put constants for TRAPV here
+// Put constants for TST here
+// Put constants for UNLK here
+
 pub fn generate() -> InstructionSet {
     // Covers all possible IR values (64k entries)
     let mut handler: InstructionSet = Vec::with_capacity(0x10000);
@@ -1242,6 +1296,53 @@ pub fn generate() -> InstructionSet {
         op_entry!(MASK_OUT_X_Y, OP_CMPM_16, cmpm_16),
         op_entry!(MASK_OUT_X_Y, OP_CMPM_32, cmpm_32),
 
+		// Put op-entries for DBcc here
+		// Put op-entries for DIVS here
+		// Put op-entries for DIVU here
+		// Put op-entries for EOR here
+		// Put op-entries for EORI here
+		// Put op-entries for EORI to CCR here
+		// Put op-entries for EORI to SR here
+		// Put op-entries for EXG here
+		// Put op-entries for EXT here
+		// Put op-entries for ILLEGAL here
+		// Put op-entries for JMP here
+		// Put op-entries for JSR here
+		// Put op-entries for LEA here
+		// Put op-entries for LINK here
+		// Put op-entries for LSL, LSR here
+		// Put op-entries for MOVE here
+		// Put op-entries for MOVEA here
+		// Put op-entries for MOVE to CCR here
+		// Put op-entries for MOVE from SR here
+		// Put op-entries for MOVE to SR here
+		// Put op-entries for MOVE USP here
+		// Put op-entries for MOVEM here
+		// Put op-entries for MOVEP here
+		// Put op-entries for MOVEQ here
+		// Put op-entries for MULS here
+		// Put op-entries for MULU here
+		// Put op-entries for NBCD here
+		// Put op-entries for NEG here
+		// Put op-entries for NEGX here
+		// Put op-entries for NOP here
+		// Put op-entries for NOT here
+		// Put op-entries for OR here
+		// Put op-entries for ORI here
+		// Put op-entries for ORI to CCR here
+		// Put op-entries for ORI to SR here
+		// Put op-entries for PEA here
+		// Put op-entries for RESET here
+		// Put op-entries for ROL, ROR here
+		// Put op-entries for ROXL, ROXR here
+		// Put op-entries for RTE here
+		// Put op-entries for RTR here
+		// Put op-entries for RTS here
+		// Put op-entries for SBCD here
+		// Put op-entries for Scc here
+		// Put op-entries for STOP here
+		// Put op-entries for SUB here
+
         op_entry!(MASK_OUT_X_Y, OP_SUB_8_ER_DN,   sub_8_er_dn),
         op_entry!(MASK_OUT_X_Y, OP_SUB_8_ER_AI,   sub_8_er_ai),
         op_entry!(MASK_OUT_X_Y, OP_SUB_8_ER_PI,   sub_8_er_pi),
@@ -1356,6 +1457,13 @@ pub fn generate() -> InstructionSet {
         op_entry!(MASK_OUT_Y, OP_SUBI_32_IX,   subi_32_ix),
         op_entry!(MASK_EXACT, OP_SUBI_32_AW,   subi_32_aw),
         op_entry!(MASK_EXACT, OP_SUBI_32_AL,   subi_32_al),
+
+		// Put op-entries for SWAP here
+		// Put op-entries for TAS here
+		// Put op-entries for TRAP here
+		// Put op-entries for TRAPV here
+		// Put op-entries for TST here
+		// Put op-entries for UNLK here
     ];
     // let mut implemented = 0;
     for op in optable {

src/cpu/ops/mod.rs

@@ -1183,6 +1183,53 @@ impl_op!(-, cmp_8,  cmpm_8, ay_pi_8, ax_pi_8, 12);
 impl_op!(-, cmp_16, cmpm_16, ay_pi_16, ax_pi_16, 12);
 impl_op!(-, cmp_32, cmpm_32, ay_pi_32, ax_pi_32, 20);
 
+// Put implementation of DBcc ops here
+// Put implementation of DIVS ops here
+// Put implementation of DIVU ops here
+// Put implementation of EOR ops here
+// Put implementation of EORI ops here
+// Put implementation of EORI to CCR ops here
+// Put implementation of EORI to SR ops here
+// Put implementation of EXG ops here
+// Put implementation of EXT ops here
+// Put implementation of ILLEGAL ops here
+// Put implementation of JMP ops here
+// Put implementation of JSR ops here
+// Put implementation of LEA ops here
+// Put implementation of LINK ops here
+// Put implementation of LSL, LSR ops here
+// Put implementation of MOVE ops here
+// Put implementation of MOVEA ops here
+// Put implementation of MOVE to CCR ops here
+// Put implementation of MOVE from SR ops here
+// Put implementation of MOVE to SR ops here
+// Put implementation of MOVE USP ops here
+// Put implementation of MOVEM ops here
+// Put implementation of MOVEP ops here
+// Put implementation of MOVEQ ops here
+// Put implementation of MULS ops here
+// Put implementation of MULU ops here
+// Put implementation of NBCD ops here
+// Put implementation of NEG ops here
+// Put implementation of NEGX ops here
+// Put implementation of NOP ops here
+// Put implementation of NOT ops here
+// Put implementation of OR ops here
+// Put implementation of ORI ops here
+// Put implementation of ORI to CCR ops here
+// Put implementation of ORI to SR ops here
+// Put implementation of PEA ops here
+// Put implementation of RESET ops here
+// Put implementation of ROL, ROR ops here
+// Put implementation of ROXL, ROXR ops here
+// Put implementation of RTE ops here
+// Put implementation of RTR ops here
+// Put implementation of RTS ops here
+// Put implementation of SBCD ops here
+// Put implementation of Scc ops here
+// Put implementation of STOP ops here
+// Put implementation of SUB ops here
+
 macro_rules! sub_8_er {
     ($name:ident, $src:ident, $cycles:expr) => (impl_op!(8, sub_8, $name, $src, dx, $cycles);)
 }
@@ -1375,3 +1422,9 @@ subi_32!(subi_32_al, ea_al_32,     20+16);
 // subi_32!(..., pcix) not present
 // subi_32!(..., imm) not present
 
+// Put implementation of SWAP ops here
+// Put implementation of TAS ops here
+// Put implementation of TRAP ops here
+// Put implementation of TRAPV ops here
+// Put implementation of TST ops here
+// Put implementation of UNLK ops here

src/musashi.rs

@@ -1030,6 +1030,53 @@ mod tests {
     qc!(OP_CMPM_16, MASK_OUT_X_Y, qc_cmpm_16);
     qc!(OP_CMPM_32, MASK_OUT_X_Y, qc_cmpm_32);
 
+    // Put qc for DBcc here
+    // Put qc for DIVS here
+    // Put qc for DIVU here
+    // Put qc for EOR here
+    // Put qc for EORI here
+    // Put qc for EORI to CCR here
+    // Put qc for EORI to SR here
+    // Put qc for EXG here
+    // Put qc for EXT here
+    // Put qc for ILLEGAL here
+    // Put qc for JMP here
+    // Put qc for JSR here
+    // Put qc for LEA here
+    // Put qc for LINK here
+    // Put qc for LSL, LSR here
+    // Put qc for MOVE here
+    // Put qc for MOVEA here
+    // Put qc for MOVE to CCR here
+    // Put qc for MOVE from SR here
+    // Put qc for MOVE to SR here
+    // Put qc for MOVE USP here
+    // Put qc for MOVEM here
+    // Put qc for MOVEP here
+    // Put qc for MOVEQ here
+    // Put qc for MULS here
+    // Put qc for MULU here
+    // Put qc for NBCD here
+    // Put qc for NEG here
+    // Put qc for NEGX here
+    // Put qc for NOP here
+    // Put qc for NOT here
+    // Put qc for OR here
+    // Put qc for ORI here
+    // Put qc for ORI to CCR here
+    // Put qc for ORI to SR here
+    // Put qc for PEA here
+    // Put qc for RESET here
+    // Put qc for ROL, ROR here
+    // Put qc for ROXL, ROXR here
+    // Put qc for RTE here
+    // Put qc for RTR here
+    // Put qc for RTS here
+    // Put qc for SBCD here
+    // Put qc for Scc here
+    // Put qc for STOP here
+    // Put qc for SUB here
+
     qc8!(OP_SUB_8_ER_DN, qc_sub_8_er_dn);
     qc8!(OP_SUB_8_ER_PI, qc_sub_8_er_pi);
     qc8!(OP_SUB_8_ER_PD, qc_sub_8_er_pd);
@@ -1145,6 +1192,12 @@ mod tests {
     qc!(OP_SUBI_32_AW, MASK_EXACT, qc_subi_32_aw);
     qc!(OP_SUBI_32_AL, MASK_EXACT, qc_subi_32_al);
 
+    // Put qc for SWAP here
+    // Put qc for TAS here
+    // Put qc for TRAP here
+    // Put qc for TRAPV here
+    // Put qc for TST here
+    // Put qc for UNLK here
 
     macro_rules! core_eq {
         ($left:ident , $right:ident . $field:ident [ $index:expr ]) => ({