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refactoring - better variable name
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rusefi committed Nov 19, 2017
1 parent a32761a commit 63ac17d
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Showing 8 changed files with 128 additions and 128 deletions.
2 changes: 1 addition & 1 deletion firmware/controllers/algo/engine_configuration.cpp
View file
Expand Up @@ -255,7 +255,7 @@ static void setDefaultFsioParameters(engine_configuration_s *engineConfiguration
engineConfiguration->auxPidPins[i] = GPIO_UNASSIGNED;
}
for (int i = 0; i < FSIO_COMMAND_COUNT; i++) {
boardConfiguration->fsioPins[i] = GPIO_UNASSIGNED;
boardConfiguration->fsioOutputPins[i] = GPIO_UNASSIGNED;
boardConfiguration->fsioDigitalInputs[i] = GPIO_UNASSIGNED;
engineConfiguration->fsioInputModes[i] = PI_DEFAULT;
}
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8 changes: 4 additions & 4 deletions firmware/controllers/algo/engine_configuration_generated_structures.h
View file
@@ -1,4 +1,4 @@
// this section was generated automatically by ConfigDefinition.jar based on rusefi_config.txt Sat Nov 18 10:06:23 EST 2017
// this section was generated automatically by ConfigDefinition.jar based on rusefi_config.txt Sun Nov 19 10:16:10 EST 2017
// begin
#ifndef ENGINE_CONFIGURATION_GENERATED_H_
#define ENGINE_CONFIGURATION_GENERATED_H_
Expand Down Expand Up @@ -674,10 +674,10 @@ typedef struct {
*/
spi_device_e max31855spiDevice;
/**
* todo: rename to fsioOutputPins
* todo: mor comments
* offset 444
*/
brain_pin_e fsioPins[FSIO_COMMAND_COUNT];
brain_pin_e fsioOutputPins[FSIO_COMMAND_COUNT];
/**
* offset 508
*/
Expand Down Expand Up @@ -2196,4 +2196,4 @@ typedef struct {

#endif
// end
// this section was generated automatically by ConfigDefinition.jar based on rusefi_config.txt Sat Nov 18 10:06:23 EST 2017
// this section was generated automatically by ConfigDefinition.jar based on rusefi_config.txt Sun Nov 19 10:16:10 EST 2017
64 changes: 32 additions & 32 deletions firmware/controllers/algo/rusefi_generated.h
View file
Expand Up @@ -612,38 +612,38 @@
#define max31855_cs8_offset_hex 424
#define max31855spiDevice_offset 1064
#define max31855spiDevice_offset_hex 428
#define fsioPins1_offset 1068
#define fsioPins1_offset_hex 42c
#define fsioPins2_offset 1072
#define fsioPins2_offset_hex 430
#define fsioPins3_offset 1076
#define fsioPins3_offset_hex 434
#define fsioPins4_offset 1080
#define fsioPins4_offset_hex 438
#define fsioPins5_offset 1084
#define fsioPins5_offset_hex 43c
#define fsioPins6_offset 1088
#define fsioPins6_offset_hex 440
#define fsioPins7_offset 1092
#define fsioPins7_offset_hex 444
#define fsioPins8_offset 1096
#define fsioPins8_offset_hex 448
#define fsioPins9_offset 1100
#define fsioPins9_offset_hex 44c
#define fsioPins10_offset 1104
#define fsioPins10_offset_hex 450
#define fsioPins11_offset 1108
#define fsioPins11_offset_hex 454
#define fsioPins12_offset 1112
#define fsioPins12_offset_hex 458
#define fsioPins13_offset 1116
#define fsioPins13_offset_hex 45c
#define fsioPins14_offset 1120
#define fsioPins14_offset_hex 460
#define fsioPins15_offset 1124
#define fsioPins15_offset_hex 464
#define fsioPins16_offset 1128
#define fsioPins16_offset_hex 468
#define fsioOutputPins1_offset 1068
#define fsioOutputPins1_offset_hex 42c
#define fsioOutputPins2_offset 1072
#define fsioOutputPins2_offset_hex 430
#define fsioOutputPins3_offset 1076
#define fsioOutputPins3_offset_hex 434
#define fsioOutputPins4_offset 1080
#define fsioOutputPins4_offset_hex 438
#define fsioOutputPins5_offset 1084
#define fsioOutputPins5_offset_hex 43c
#define fsioOutputPins6_offset 1088
#define fsioOutputPins6_offset_hex 440
#define fsioOutputPins7_offset 1092
#define fsioOutputPins7_offset_hex 444
#define fsioOutputPins8_offset 1096
#define fsioOutputPins8_offset_hex 448
#define fsioOutputPins9_offset 1100
#define fsioOutputPins9_offset_hex 44c
#define fsioOutputPins10_offset 1104
#define fsioOutputPins10_offset_hex 450
#define fsioOutputPins11_offset 1108
#define fsioOutputPins11_offset_hex 454
#define fsioOutputPins12_offset 1112
#define fsioOutputPins12_offset_hex 458
#define fsioOutputPins13_offset 1116
#define fsioOutputPins13_offset_hex 45c
#define fsioOutputPins14_offset 1120
#define fsioOutputPins14_offset_hex 460
#define fsioOutputPins15_offset 1124
#define fsioOutputPins15_offset_hex 464
#define fsioOutputPins16_offset 1128
#define fsioOutputPins16_offset_hex 468
#define gpioPinModes1_offset 1132
#define gpioPinModes1_offset_hex 46c
#define gpioPinModes2_offset 1136
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20 changes: 10 additions & 10 deletions firmware/controllers/core/fsio_impl.cpp
View file
Expand Up @@ -185,7 +185,7 @@ static void setFsioOutputPin(const char *indexStr, const char *pinName) {
scheduleMsg(logger, "invalid pin name [%s]", pinName);
return;
}
boardConfiguration->fsioPins[index] = pin;
boardConfiguration->fsioOutputPins[index] = pin;
scheduleMsg(logger, "FSIO output pin #%d [%s]", (index + 1), hwPortname(pin));
}
#endif /* EFI_PROD_CODE */
Expand All @@ -196,7 +196,7 @@ static void setFsioOutputPin(const char *indexStr, const char *pinName) {
* index is between zero and LE_COMMAND_LENGTH-1
*/
void setFsioExt(int index, brain_pin_e pin, const char * exp, int pwmFrequency DECLARE_ENGINE_PARAMETER_SUFFIX) {
boardConfiguration->fsioPins[index] = pin;
boardConfiguration->fsioOutputPins[index] = pin;
int len = strlen(exp);
if (len >= LE_COMMAND_LENGTH) {
return;
Expand All @@ -212,7 +212,7 @@ void setFsio(int index, brain_pin_e pin, const char * exp DECLARE_ENGINE_PARAMET
void applyFsioConfiguration(DECLARE_ENGINE_PARAMETER_SIGNATURE) {
userPool.reset();
for (int i = 0; i < FSIO_COMMAND_COUNT; i++) {
brain_pin_e brainPin = boardConfiguration->fsioPins[i];
brain_pin_e brainPin = boardConfiguration->fsioOutputPins[i];

if (brainPin != GPIO_UNASSIGNED) {
const char *formula = config->fsioFormulas[i];
Expand Down Expand Up @@ -276,14 +276,14 @@ static const char *getGpioPinName(int index) {
* @param index from zero for (FSIO_COMMAND_COUNT - 1)
*/
static void handleFsio(Engine *engine, int index) {
if (boardConfiguration->fsioPins[index] == GPIO_UNASSIGNED)
if (boardConfiguration->fsioOutputPins[index] == GPIO_UNASSIGNED)
return;

bool isPwmMode = boardConfiguration->fsioFrequency[index] != NO_PWM;

float fvalue;
if (fsioLogics[index] == NULL) {
warning(CUSTOM_NO_FSIO, "no FSIO for #%d %s", index + 1, hwPortname(boardConfiguration->fsioPins[index]));
warning(CUSTOM_NO_FSIO, "no FSIO for #%d %s", index + 1, hwPortname(boardConfiguration->fsioOutputPins[index]));
fvalue = NAN;
} else {
fvalue = calc.getValue2(engine->fsioLastValue[index], fsioLogics[index] PASS_ENGINE_PARAMETER_SUFFIX);
Expand Down Expand Up @@ -359,9 +359,9 @@ static void setFsioFrequency(int index, int frequency) {
}
boardConfiguration->fsioFrequency[index] = frequency;
if (frequency == 0) {
scheduleMsg(logger, "FSIO output #%d@%s set to on/off mode", index + 1, hwPortname(boardConfiguration->fsioPins[index]));
scheduleMsg(logger, "FSIO output #%d@%s set to on/off mode", index + 1, hwPortname(boardConfiguration->fsioOutputPins[index]));
} else {
scheduleMsg(logger, "Setting FSIO frequency %dHz on #%d@%s", frequency, index + 1, hwPortname(boardConfiguration->fsioPins[index]));
scheduleMsg(logger, "Setting FSIO frequency %dHz on #%d@%s", frequency, index + 1, hwPortname(boardConfiguration->fsioOutputPins[index]));
}
}

Expand Down Expand Up @@ -458,7 +458,7 @@ static void showFsioInfo(void) {
* is the fact that the target audience is more software developers
*/
scheduleMsg(logger, "FSIO #%d [%s] at %s@%dHz value=%f", (i + 1), exp,
hwPortname(boardConfiguration->fsioPins[i]), boardConfiguration->fsioFrequency[i],
hwPortname(boardConfiguration->fsioOutputPins[i]), boardConfiguration->fsioFrequency[i],
engine->fsioLastValue[i]);
// scheduleMsg(logger, "user-defined #%d value=%f", i, engine->engineConfiguration2->fsioLastValue[i]);
showFsio(NULL, fsioLogics[i]);
Expand Down Expand Up @@ -551,12 +551,12 @@ void initFsioImpl(Logging *sharedLogger DECLARE_ENGINE_PARAMETER_SUFFIX) {

#if EFI_PROD_CODE || defined(__DOXYGEN__)
for (int i = 0; i < FSIO_COMMAND_COUNT; i++) {
brain_pin_e brainPin = boardConfiguration->fsioPins[i];
brain_pin_e brainPin = boardConfiguration->fsioOutputPins[i];

if (brainPin != GPIO_UNASSIGNED) {
int frequency = boardConfiguration->fsioFrequency[i];
if (frequency == 0) {
enginePins.fsioOutputs[i].initPin(getGpioPinName(i), boardConfiguration->fsioPins[i], &DEFAULT_OUTPUT);
enginePins.fsioOutputs[i].initPin(getGpioPinName(i), boardConfiguration->fsioOutputPins[i], &DEFAULT_OUTPUT);
} else {
startSimplePwmExt(&fsioPwm[i], "FSIOpwm", brainPin, &enginePins.fsioOutputs[i], frequency, 0.5f, applyPinState);
}
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4 changes: 2 additions & 2 deletions firmware/controllers/system/efiGpio.cpp
View file
Expand Up @@ -102,8 +102,8 @@ void EnginePins::unregisterPins() {
engineConfiguration->bc.idle.solenoidPin);

for (int i = 0;i < FSIO_COMMAND_COUNT;i++) {
fsioOutputs[i].unregisterOutput(activeConfiguration.bc.fsioPins[i],
engineConfiguration->bc.fsioPins[i]);
fsioOutputs[i].unregisterOutput(activeConfiguration.bc.fsioOutputPins[i],
engineConfiguration->bc.fsioOutputPins[i]);
}

alternatorPin.unregisterOutput(activeConfiguration.bc.alternatorControlPin,
Expand Down
2 changes: 1 addition & 1 deletion firmware/integration/rusefi_config.txt
View file
Expand Up @@ -535,7 +535,7 @@ bit is_enabled_spi_2

spi_device_e max31855spiDevice;

brain_pin_e[FSIO_COMMAND_COUNT iterate] fsioPins;todo: rename to fsioOutputPins
brain_pin_e[FSIO_COMMAND_COUNT iterate] fsioOutputPins;todo: mor comments
pin_output_mode_e[FSIO_COMMAND_COUNT iterate] gpioPinModes;

custom uart_device_e 4 bits,U32, @OFFSET@, [0:1], "Off", "UART1", "UART2", "UART3"
Expand Down

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