Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Added RP2040-LoRA target #3195

Merged
merged 3 commits into from
Feb 11, 2024
Merged

Added RP2040-LoRA target #3195

merged 3 commits into from
Feb 11, 2024

Conversation

thebentern
Copy link
Contributor

Based on @markbirss's work

thebentern added a commit to meshtastic/artifacts that referenced this pull request Feb 10, 2024
@thebentern thebentern marked this pull request as ready for review February 11, 2024 02:09
@thebentern thebentern merged commit ce8673b into master Feb 11, 2024
2 of 46 checks passed
@thebentern thebentern deleted the rp2040-lora branch February 11, 2024 02:09
@markbirss
Copy link
Contributor

Im my tests i did get some noise and bad packets

@thebentern
Copy link
Contributor Author

Im my tests i did get some noise and bad packets

Perhaps there is something misconfigured with the SX1262 pins in the variant. The pin map indicates a SX1262_ANT_SW on GPIO17 which sounds similar to how the xiao-ble variant uses the RXEN pin only in conjunction with DIO2. I wonder if the noise and bad packets could be that the switch is still in transmit mode as we try to receive message.

mverch67 pushed a commit that referenced this pull request Feb 12, 2024
Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment
Labels
None yet
Projects
None yet
Development

Successfully merging this pull request may close these issues.

None yet

2 participants