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GB: Fix IRQ disabling on the same T-cycle as an assert
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endrift committed Aug 10, 2018
1 parent 1fb4d2b commit 25cda2d
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Showing 4 changed files with 9 additions and 6 deletions.
1 change: 1 addition & 0 deletions CHANGES
Expand Up @@ -45,6 +45,7 @@ Bugfixes:
- GBA Video: Improve sprite cycle counting (fixes mgba.io/i/1126)
- GB, GBA Savedata: Fix savestate loading overwriting saves on reset
- GBA Video: Make layer disabling work consistently
- GB: Fix IRQ disabling on the same T-cycle as an assert
Misc:
- GBA Timer: Use global cycles for timers
- GBA: Extend oddly-sized ROMs to full address space (fixes mgba.io/i/722)
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1 change: 0 additions & 1 deletion cinema/gb/mooneye-gb/acceptance/rapid_di_ei/manifest.yml

This file was deleted.

11 changes: 7 additions & 4 deletions src/gb/gb.c
Expand Up @@ -625,7 +625,11 @@ void GBUpdateIRQs(struct GB* gb) {
}
gb->cpu->halted = false;

if (!gb->memory.ime || gb->cpu->irqPending) {
if (!gb->memory.ime) {
gb->cpu->irqPending = false;
return;
}
if (gb->cpu->irqPending) {
return;
}
LR35902RaiseIRQ(gb->cpu);
Expand Down Expand Up @@ -661,12 +665,11 @@ void GBProcessEvents(struct LR35902Core* cpu) {

void GBSetInterrupts(struct LR35902Core* cpu, bool enable) {
struct GB* gb = (struct GB*) cpu->master;
mTimingDeschedule(&gb->timing, &gb->eiPending);
if (!enable) {
gb->memory.ime = enable;
mTimingDeschedule(&gb->timing, &gb->eiPending);
gb->memory.ime = false;
GBUpdateIRQs(gb);
} else {
mTimingDeschedule(&gb->timing, &gb->eiPending);
mTimingSchedule(&gb->timing, &gb->eiPending, 4);
}
}
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2 changes: 1 addition & 1 deletion src/lr35902/lr35902.c
Expand Up @@ -137,7 +137,7 @@ static void _LR35902Step(struct LR35902Core* cpu) {
}

void LR35902Tick(struct LR35902Core* cpu) {
if (cpu->cycles >= cpu->nextEvent) {
while (cpu->cycles >= cpu->nextEvent) {
cpu->irqh.processEvents(cpu);
}
_LR35902Step(cpu);
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