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stm32: Add initial support for STM32WL MCUs.
Signed-off-by: Damien George <damien@micropython.org>
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,45 @@ | ||
| Port,,AF0,AF1,AF2,AF3,AF4,AF5,AF6,AF7,AF8,AF9,AF10,AF11,AF12,AF13,AF14,AF15, | ||
| ,,SYS_AF,TIM1/TIM2/LPTIM1,TIM1/TIM2,SPI2S2/TIM1/LPTIM3,I2C1/I2C2/I2C3,SPI1/SPI2S2,RF,USART1/USART2,LPUART1,,,,COMP1/COMP2/TIM1,DEBUG,TIM2/TIM16/TIM17/LPTIM2,EVENOUT,ADC | ||
| PortA,PA0,,TIM2_CH1,,,I2C3_SMBA,I2S_CKIN,,USART2_CTS,,,,,COMP1_OUT,DEBUG_PWR_REGLP1S,TIM2_ETR,EVENTOUT,ADC123_IN0 | ||
| PortA,PA1,,TIM2_CH2,,LPTIM3_OUT,I2C1_SMBA,SPI1_SCK,,USART2_RTS,LPUART1_RTS,,,,,DEBUG_PWR_REGLP2S,,EVENTOUT,ADC123_IN1 | ||
| PortA,PA2,LSCO,TIM2_CH3,,,,,,USART2_TX,LPUART1_TX,,,,COMP2_OUT,DEBUG_PWR_LDORDY,,EVENTOUT,ADC123_IN2 | ||
| PortA,PA3,,TIM2_CH4,,,,I2S2_MCK,,USART2_RX,LPUART1_RX,,,,,,,EVENTOUT,ADC123_IN3 | ||
| PortA,PA4,RTC_OUT2,LPTIM1_OUT,,,,SPI1_NSS,,USART2_CK,,,,,,DEBUG_SUBGHZSPI_NSSOUT,LPTIM2_OUT,EVENTOUT,ADC12_IN4 | ||
| PortA,PA5,,TIM2_CH1,TIM2_ETR,SPI2_MISO,,SPI1_SCK,,,,,,,,DEBUG_SUBGHZSPI_SCKOUT,LPTIM2_ETR,EVENTOUT,ADC12_IN5 | ||
| PortA,PA6,,TIM1_BKIN,,,I2C2_SMBA,SPI1_MISO,,,LPUART1_CTS,,,,TIM1_BKIN,DEBUG_SUBGHZSPI_MISOOUT,TIM16_CH1,EVENTOUT,ADC12_IN6 | ||
| PortA,PA7,,TIM1_CH1N,,,I2C3_SCL,SPI1_MOSI,,,,,,,COMP2_OUT,DEBUG_SUBGHZSPI_MOSIOUT,TIM17_CH1,EVENTOUT,ADC12_IN7 | ||
| PortA,PA8,MCO,TIM1_CH1,,,,SPI2_SCK/I2S2_CK,,USART1_CK,,,,,,,LPTIM2_OUT,EVENTOUT, | ||
| PortA,PA9,,TIM1_CH2,,SPI2_NSS/I2S2_WS,I2C1_SCL,SPI2_SCK/I2S2_CK,,USART1_TX,,,,,,,,EVENTOUT, | ||
| PortA,PA10,RTC_REFIN,TIM1_CH3,,,I2C1_SDA,SPI2_MOSI/I2S2_SD,,USART1_RX,,,,,,DEBUG_RF_HSE32RDY,TIM17_BKIN,EVENTOUT, | ||
| PortA,PA11,,TIM1_CH4,TIM1_BKIN2,LPTIM3_ETR,I2C2_SDA,SPI1_MISO,,USART1_CTS,,,,,TIM1_BKIN2,DEBUG_RF_NRESET,,EVENTOUT, | ||
| PortA,PA12,,TIM1_ETR,,LPTIM3_IN1,I2C2_SCL,SPI1_MOSI,RF_BUSY,USART1_RTS,,,,,,,,EVENTOUT, | ||
| PortA,PA13,JTMS/SWDIO,,,,I2C2_SMBA,,,,IR_OUT,,,,,,,EVENTOUT, | ||
| PortA,PA14,JTCK/SWCLK,LPTIM1_OUT,,,I2C1_SMBA,,,,,,,,,,,EVENTOUT, | ||
| PortA,PA15,JTDI,TIM2_CH1,TIM2_ETR,,I2C2_SDA,SPI1_NSS,,,,,,,,,,EVENTOUT, | ||
| PortB,PB0,,,,,,,,,,,,,COMP1_OUT,,,EVENTOUT,ADC12_IN8 | ||
| PortB,PB1,,,,,,,,,LPUART1_RTS_DE,,,,,,LPTIM2_IN1,EVENTOUT,ADC12_IN9 | ||
| PortB,PB2,,LPTIM1_OUT,,,I2C3_SMBA,SPI1_NSS,,,,,,,,DEBUG_RF_SMPSRDY,,EVENTOUT, | ||
| PortB,PB3,JTDO/TRACESWO,TIM2_CH2,,,,SPI1_SCK,RF_IRQ0,USART1_RTS,,,,,,DEBUG_RF_DTB1,,EVENTOUT, | ||
| PortB,PB4,NJTRST,,,,I2C3_SDA,SPI1_MISO,,USART1_CTS,,,,,,DEBUG_RF_LDORDY,TIM17_BKIN,EVENTOUT, | ||
| PortB,PB5,,LPTIM1_IN1,,,I2C1_SMBA,SPI1_MOSI,RF_IRQ1,USART1_CK,,,,,COMP2_OUT,,TIM16_BKIN,EVENTOUT, | ||
| PortB,PB6,,LPTIM1_ETR,,,I2C1_SCL,,,USART1_TX,,,,,,,TIM16_CH1N,EVENTOUT, | ||
| PortB,PB7,,LPTIM1_IN2,,TIM1_BKIN,I2C1_SDA,,,USART1_RX,,,,,,,TIM17_CH1N,EVENTOUT, | ||
| PortB,PB8,,TIM1_CH2N,,,I2C1_SCL,,RF_IRQ2,,,,,,,,TIM16_CH1,EVENTOUT, | ||
| PortB,PB9,,TIM1_CH3N,,,I2C1_SDA,SPI2_NSS/I2S2_WS,,,IR_OUT,,,,,,TIM17_CH1,EVENTOUT, | ||
| PortB,PB10,,TIM2_CH3,,,I2C3_SCL,SPI2_SCK/I2S2_CK,,,LPUART1_RX,,,,COMP1_OUT,,,EVENTOUT, | ||
| PortB,PB11,,TIM2_CH4,,,I2C3_SDA,,,,LPUART1_TX,,,,COMP2_OUT,,,EVENTOUT, | ||
| PortB,PB12,,TIM1_BKIN,,TIM1_BKIN,I2C3_SMBA,SPI2_NSS/I2S2_WS,,,LPUART1_RTS,,,,,,,EVENTOUT, | ||
| PortB,PB13,,TIM1_CH1N,,,I2C3_SCL,SPI2_SCK/I2S2_CK,,,LPUART1_CTS,,,,,,,EVENTOUT, | ||
| PortB,PB14,,TIM1_CH2N,,I2S2_MCK,I2C3_SDA,SPI2_MISO,,,,,,,,,,EVENTOUT, | ||
| PortB,PB15,,TIM1_CH3N,,,I2C2_SCL,SPI2_MOSI/I2S2_SD,,,,,,,,,,EVENTOUT, | ||
| PortC,PC0,,LPTIM1_IN1,,,I2C3_SCL,,,,LPUART1_RX,,,,,,LPTIM2_IN1,EVENTOUT,ADC123_IN10 | ||
| PortC,PC1,,LPTIM1_OUT,,SPI2_MOSI/I2S2_SD,I2C3_SDA,,,,LPUART1_TX,,,,,,,EVENTOUT,ADC123_IN11 | ||
| PortC,PC2,,LPTIM1_IN2,,,,SPI2_MISO,,,,,,,,,,EVENTOUT,ADC123_IN12 | ||
| PortC,PC3,,LPTIM1_ETR,,,,SPI2_MOSI/I2S2_SD,,,,,,,,,LPTIM2_ETR,EVENTOUT,ADC123_IN13 | ||
| PortC,PC4,,,,,,,,,,,,,,,,EVENTOUT,ADC12_IN14 | ||
| PortC,PC5,,,,,,,,,,,,,,,,EVENTOUT,ADC12_IN15 | ||
| PortC,PC6,,,,,,I2S2_MCK,,,,,,,,,,EVENTOUT, | ||
| PortC,PC13,,,,,,,,,,,,,,,,EVENTOUT, | ||
| PortC,PC14,,,,,,,,,,,,,,,,EVENTOUT, | ||
| PortC,PC15,,,,,,,,,,,,,,,,EVENTOUT, | ||
| PortH,PH3,,,,,,,,,,,,,,,,EVENTOUT, |
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,34 @@ | ||
| /* | ||
| GNU linker script for STM32WL55xC | ||
| */ | ||
|
|
||
| /* Specify the memory areas */ | ||
| MEMORY | ||
| { | ||
| FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 256K /* sectors 0-127 */ | ||
| FLASH_APP (rx) : ORIGIN = 0x08000000, LENGTH = 232K /* sectors 0-115 */ | ||
| FLASH_FS (r) : ORIGIN = 0x0803a000, LENGTH = 24K /* sectors 116-127 */ | ||
| RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 64K /* SRAM1+SRAM2 */ | ||
| } | ||
|
|
||
| /* produce a link error if there is not this amount of RAM for these sections */ | ||
| _minimum_stack_size = 2K; | ||
| _minimum_heap_size = 16K; | ||
|
|
||
| /* RAM extents for the garbage collector */ | ||
| _ram_start = ORIGIN(RAM); | ||
| _ram_end = ORIGIN(RAM) + LENGTH(RAM); | ||
|
|
||
| _micropy_hw_internal_flash_storage_ram_cache_end = ORIGIN(RAM) + LENGTH(RAM); | ||
| _micropy_hw_internal_flash_storage_ram_cache_start = _micropy_hw_internal_flash_storage_ram_cache_end - 2K; /* fs cache = 2K */ | ||
|
|
||
| /* Define the stack. The stack is full descending so begins at the bottom of FS cache. | ||
| Note that EABI requires the stack to be 8-byte aligned for a call. */ | ||
| _estack = _micropy_hw_internal_flash_storage_ram_cache_start - _estack_reserve; | ||
| _sstack = _estack - 6K; | ||
|
|
||
| _heap_start = _ebss; /* heap starts just after statically allocated memory */ | ||
| _heap_end = _sstack; | ||
|
|
||
| _micropy_hw_internal_flash_storage_start = ORIGIN(FLASH_FS); | ||
| _micropy_hw_internal_flash_storage_end = ORIGIN(FLASH_FS) + LENGTH(FLASH_FS); |
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,78 @@ | ||
| /* | ||
| * This file is part of the MicroPython project, http://micropython.org/ | ||
| * | ||
| * The MIT License (MIT) | ||
| * | ||
| * Copyright (c) 2021 Damien P. George | ||
| * | ||
| * Permission is hereby granted, free of charge, to any person obtaining a copy | ||
| * of this software and associated documentation files (the "Software"), to deal | ||
| * in the Software without restriction, including without limitation the rights | ||
| * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell | ||
| * copies of the Software, and to permit persons to whom the Software is | ||
| * furnished to do so, subject to the following conditions: | ||
| * | ||
| * The above copyright notice and this permission notice shall be included in | ||
| * all copies or substantial portions of the Software. | ||
| * | ||
| * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | ||
| * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | ||
| * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE | ||
| * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | ||
| * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, | ||
| * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN | ||
| * THE SOFTWARE. | ||
| */ | ||
| #ifndef MICROPY_INCLUDED_STM32WLXX_HAL_CONF_BASE_H | ||
| #define MICROPY_INCLUDED_STM32WLXX_HAL_CONF_BASE_H | ||
|
|
||
| // Include various HAL modules for convenience | ||
| #include "stm32wlxx_hal_dma.h" | ||
| #include "stm32wlxx_hal_adc.h" | ||
| #include "stm32wlxx_hal_cortex.h" | ||
| #include "stm32wlxx_hal_flash.h" | ||
| #include "stm32wlxx_hal_gpio.h" | ||
| #include "stm32wlxx_hal_i2c.h" | ||
| #include "stm32wlxx_hal_pwr.h" | ||
| #include "stm32wlxx_hal_rcc.h" | ||
| #include "stm32wlxx_hal_rtc.h" | ||
| #include "stm32wlxx_hal_spi.h" | ||
| #include "stm32wlxx_hal_tim.h" | ||
| #include "stm32wlxx_hal_uart.h" | ||
| #include "stm32wlxx_hal_usart.h" | ||
| #include "stm32wlxx_ll_adc.h" | ||
| #include "stm32wlxx_ll_lpuart.h" | ||
| #include "stm32wlxx_ll_rtc.h" | ||
| #include "stm32wlxx_ll_usart.h" | ||
|
|
||
| // Enable various HAL modules | ||
| #define HAL_MODULE_ENABLED | ||
| #define HAL_CORTEX_MODULE_ENABLED | ||
| #define HAL_DMA_MODULE_ENABLED | ||
| #define HAL_FLASH_MODULE_ENABLED | ||
| #define HAL_GPIO_MODULE_ENABLED | ||
| #define HAL_PWR_MODULE_ENABLED | ||
| #define HAL_RCC_MODULE_ENABLED | ||
| #define HAL_RTC_MODULE_ENABLED | ||
| #define HAL_SPI_MODULE_ENABLED | ||
| #define HAL_TIM_MODULE_ENABLED | ||
| #define HAL_UART_MODULE_ENABLED | ||
| #define HAL_USART_MODULE_ENABLED | ||
|
|
||
| // Oscillator values in Hz | ||
| #define MSI_VALUE (4000000) | ||
|
|
||
| // SysTick has the highest priority | ||
| #define TICK_INT_PRIORITY (0x00) | ||
|
|
||
| // Miscellaneous HAL settings | ||
| #define DATA_CACHE_ENABLE 1 | ||
| #define INSTRUCTION_CACHE_ENABLE 1 | ||
| #define PREFETCH_ENABLE 0 | ||
| #define USE_SPI_CRC 0 | ||
| #define USE_RTOS 0 | ||
|
|
||
| // HAL parameter assertions are disabled | ||
| #define assert_param(expr) ((void)0) | ||
|
|
||
| #endif // MICROPY_INCLUDED_STM32WLXX_HAL_CONF_BASE_H |
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