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esp32: Update port to support IDF v5.0.2.
This commit updates the esp32 port to work exclusively with ESP-IDF v5. IDF v5 is needed for some of the newer ESP32 SoCs to work, and it also cleans up a lot of the inconsistencies between existing SoCs (eg S2, S3, and C3). Support for IDF v4 is dropped because it's a lot of effort to maintain both versions at the same time. The following components have been verified to work on the various SoCs: ESP32 ESP32-S2 ESP32-S3 ESP32-C3 build pass pass pass pass SPIRAM pass pass pass N/A REPL (UART) pass pass pass pass REPL (USB) N/A pass pass N/A filesystem pass pass pass pass GPIO pass pass pass pass SPI pass pass pass pass I2C pass pass pass pass PWM pass pass pass pass ADC pass pass pass pass WiFi STA pass pass pass pass WiFi AP pass pass pass pass BLE pass N/A pass pass ETH pass -- -- -- PPP pass pass pass -- sockets pass pass pass pass SSL pass ENOMEM pass pass RMT pass pass pass pass NeoPixel pass pass pass pass I2S pass pass pass N/A ESPNow pass pass pass pass ULP-FSM pass pass pass N/A SDCard pass N/A N/A pass WDT pass pass pass pass Signed-off-by: Damien George <damien@micropython.org> Signed-off-by: Jim Mussared <jim.mussared@gmail.com>
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dependencies.lock | ||
managed_components/ |
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CONFIG_ESP32C3_REV_MIN_3=y | ||
CONFIG_ESP32C3_REV_MIN=3 | ||
CONFIG_ESP32C3_BROWNOUT_DET=y | ||
CONFIG_ESP32C3_BROWNOUT_DET_LVL_SEL_7= | ||
CONFIG_ESP32C3_BROWNOUT_DET_LVL_SEL_4=y | ||
CONFIG_ESP32C3_BROWNOUT_DET_LVL=4 | ||
CONFIG_ESP_CONSOLE_UART_DEFAULT= | ||
CONFIG_ESP_CONSOLE_USB_CDC= | ||
CONFIG_ESP_CONSOLE_USB_SERIAL_JTAG=y |
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CONFIG_ESP32C3_REV_MIN_3=y | ||
CONFIG_ESP32C3_REV_MIN=3 | ||
CONFIG_ESP32C3_BROWNOUT_DET=y | ||
CONFIG_ESP32C3_BROWNOUT_DET_LVL_SEL_7= | ||
CONFIG_ESP32C3_BROWNOUT_DET_LVL_SEL_4=y | ||
CONFIG_ESP32C3_BROWNOUT_DET_LVL=4 | ||
CONFIG_ESP_CONSOLE_UART_DEFAULT= | ||
CONFIG_ESP_CONSOLE_USB_CDC= | ||
CONFIG_ESP_CONSOLE_USB_SERIAL_JTAG=y |
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# MicroPython on ESP32, ESP IDF configuration with 240MHz CPU | ||
CONFIG_ESP32_DEFAULT_CPU_FREQ_80= | ||
CONFIG_ESP32_DEFAULT_CPU_FREQ_160= | ||
CONFIG_ESP32_DEFAULT_CPU_FREQ_240=y | ||
CONFIG_ESP32_DEFAULT_CPU_FREQ_MHZ=240 | ||
CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ_40= | ||
CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ_80= | ||
CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ_160= | ||
CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ_240=y | ||
CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ=240 |
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# Note this requires building with IDF 4.x | ||
CONFIG_BT_NIMBLE_LOG_LEVEL_ERROR=y | ||
CONFIG_BT_ENABLED=y | ||
CONFIG_BTDM_CTRL_MODE_BLE_ONLY=y | ||
CONFIG_BTDM_CTRL_MODE_BR_EDR_ONLY= | ||
CONFIG_BTDM_CTRL_MODE_BTDM= | ||
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CONFIG_BT_NIMBLE_ENABLED=y | ||
CONFIG_BT_CONTROLLER_ENABLED=y | ||
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CONFIG_BT_NIMBLE_MAX_CONNECTIONS=4 | ||
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# Put NimBLE on core 1, and for synchronisation | ||
# with the ringbuffer and scheduler MP needs to be on the same core. | ||
# MP on core 1 prevents interference with WiFi for time sensitive operations. | ||
# Only on: ESP32, ESP32S2, ESP32S3 | ||
CONFIG_BT_NIMBLE_PINNED_TO_CORE_0=n | ||
CONFIG_BT_NIMBLE_PINNED_TO_CORE_1=y | ||
CONFIG_BT_NIMBLE_PINNED_TO_CORE=1 |
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