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Fix UART BRR when OVERSAMPLING_8 #1276

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doegox
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@doegox doegox commented May 21, 2015

There was a bug in ST UART driver when OVERSAMPLING_8.
At the moment micropython is only using OVERSAMPLING_16 so this bug is not affecting current micropython fw.
But if one day one wants to enable higher baudrates (~5.5M to 10.5M) and use OVERSAMPLING_8 the bug is triggered (and e.g. setting 7M would give an actual 10.5M baudrate).
This bug was revealed when playing around with the native firmware of hydrabus, see hydrabus/hydrafw#14

Source:
STM32F405 reference manual, 30.3.4 page 965:

USARTDIV is an unsigned fixed point number that is coded on the USART_BRR register.
Note:
• When OVER8=0, the fractional part is coded on 4 bits and programmed by the DIV_fraction[3:0] bits in the USART_BRR register
• When OVER8=1, the fractional part is coded on 3 bits and programmed by the DIV_fraction[2:0] bits in the USART_BRR register, and bit DIV_fraction[3] must be kept cleared.

There was a bug in ST UART driver when OVERSAMPLING_8.
At the moment micropython is only using OVERSAMPLING_16 so this bug is not affecting current micropython fw.
But if one day one wants to enable higher baudrates (~5.5M to 10.5M) and use OVERSAMPLING_8 the bug is triggered (and e.g. setting 7M would give an actual 10.5M baudrate).
This bug was revealed when playing around with the native firmware of hydrabus, see hydrabus/hydrafw#14

Source:
STM32F405 reference manual, 30.3.4 page 965:

 USARTDIV is an unsigned fixed point number that is coded on the USART_BRR register.
 Note:
 • When OVER8=0, the fractional part is coded on 4 bits and programmed by the DIV_fraction[3:0] bits in the USART_BRR register
 • When OVER8=1, the fractional part is coded on 3 bits and programmed by the DIV_fraction[2:0] bits in the USART_BRR register, and bit DIV_fraction[3] must be kept cleared.
@coveralls
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Coverage Status

Coverage increased (+0.0%) to 93.81% when pulling 4122cd5 on doegox:doegox_fixuart into a3c96c9 on micropython:master.

@pfalcon
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pfalcon commented May 21, 2015

Did you try to report this to ST?

@doegox
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doegox commented May 21, 2015

I reported to a friend working at ST, will see if it's enough or if I need to go through some more official reporting

@dpgeorge
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There is a new version of the ST Cube HAL (1.5.0) which came out a month or so ago. Maybe it's fixed in that version?

@blmorris
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It doesn't appear to be fixed, although many things have been renamed and re-arranged.
Here are the lines from the version released 09-March-2015:

#define UART_DIV_SAMPLING8(_PCLK_, _BAUD_)             (((_PCLK_)*25)/(2*(_BAUD_)))
#define UART_DIVMANT_SAMPLING8(_PCLK_, _BAUD_)         (UART_DIV_SAMPLING8((_PCLK_), (_BAUD_))/100)
#define UART_DIVFRAQ_SAMPLING8(_PCLK_, _BAUD_)         (((UART_DIV_SAMPLING8((_PCLK_), (_BAUD_)) - (UART_DIVMANT_SAMPLING8((_PCLK_), (_BAUD_)) * 100)) * 16 + 50) / 100)
#define UART_BRR_SAMPLING8(_PCLK_, _BAUD_)             ((UART_DIVMANT_SAMPLING8((_PCLK_), (_BAUD_)) << 4)|(UART_DIVFRAQ_SAMPLING8((_PCLK_), (_BAUD_)) & 0x0F))

@dpgeorge
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dpgeorge commented May 2, 2018

This is fixed in the latest ST F4 HAL that this project is using.

@dpgeorge dpgeorge closed this May 2, 2018
tannewt pushed a commit to tannewt/circuitpython that referenced this pull request Oct 16, 2018
[ES] Translate strings on Mixer module
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5 participants