*Other names and brands may be claimed as the property of others.
Intel® Compiler for SystemC* (ICSC) translates synthesizable SystemC design to synthesizable SystemVerilog design.
ICSC supports SystemC synthesizable subset in method and thread processes and arbitrary C++ code in module constructors. The tool produces human-readable SystemVerilog for complex multi-module designs in tens of seconds. ICSC performs design checks to detect non-synthesizable code and common coding mistakes.
See more information at Intel Compiler for SystemC wiki.
ICSC is distributed under the Apache License v2.0 with LLVM Exceptions.
ICSC is based on Clang/LLVM frontend and can be installed at most Linux OS. There is install.sh script that downloads and builds ICSC and the required dependencies at SLES12, Ubuntu 22.04, and Ubuntu 20.04.
An instruction how to install and run ISCS is given at Getting started.
User guide document describes installation procedure, run tool options, preparation of SystemC design for synthesis, tool extensions and advanced verification features.
ICSC supports SystemC Synthesizable Subset. Details of SystemC/C++ subset supported are described at SystemC/C++ supported.
- SystemC-to-Verilog Compiler: a productivity-focused tool for hardware design in cycle-accurate SystemC at DvCon'2019
- Temporal assertions in SystemC at DvCon'2020 and SystemC evolution day'2020
- Intel Compiler for SystemC and SystemC common library at CHIPS tech summit 2022
To get help please submit your question or issue