ADC sequence of G0 (and C0) devicec have wrong channel shift? #2733
linux.yml
on: pull_request
unittests-linux-generic
15m 42s
stm32-examples
15m 5s
stm32f4-examples-1
8m 44s
stm32f4-examples-2
9m 11s
avr-examples
5m 26s
hal-compile-quick-1
11m 22s
hal-compile-quick-2
16m 57s
hal-compile-quick-3
15m 34s
hal-compile-quick-4
14m 18s
build-docs-test
14m 35s
Artifacts
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build-docs-test
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71.7 MB |
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build-homepage-test
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6.53 MB |
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hal-compile-quick-1
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44.4 KB |
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hal-compile-quick-2
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48.3 KB |
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hal-compile-quick-3
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46.7 KB |
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hal-compile-quick-4
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43.4 KB |
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hal-compile-quick-avr
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21.7 KB |
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