Skip to content

Commit

Permalink
-Merge (#1048)
Browse files Browse the repository at this point in the history
  • Loading branch information
tgiphil committed May 13, 2023
1 parent 602d162 commit 4e9a435
Show file tree
Hide file tree
Showing 83 changed files with 2,028 additions and 127 deletions.
83 changes: 83 additions & 0 deletions Source/Data/IR-Instructions.json
Original file line number Diff line number Diff line change
Expand Up @@ -34,6 +34,13 @@
"OperandCount": 2,
"Commutative": "true"
},
{
"Name": "AddManagedPointer",
"FamilyName": "IR",
"ResultCount": 1,
"OperandCount": 2,
"Commutative": "true"
},
{
"Name": "AddCarryOut32",
"FamilyName": "IR",
Expand Down Expand Up @@ -172,6 +179,13 @@
"OperandCount": 2,
"ResultType": "Boolean"
},
{
"Name": "CompareManagedPointer",
"FamilyName": "IR",
"ResultCount": 1,
"OperandCount": 2,
"ResultType": "Boolean"
},
{
"Name": "Compare32x32",
"FamilyName": "IR",
Expand Down Expand Up @@ -221,6 +235,13 @@
"OperandCount": 0,
"FlowControl": "ConditionalBranch"
},
{
"Name": "BranchManagedPointer",
"FamilyName": "IR",
"ResultCount": 2,
"OperandCount": 0,
"FlowControl": "ConditionalBranch"
},
{
"Name": "ConvertR4ToR8",
"FamilyName": "IR",
Expand Down Expand Up @@ -522,6 +543,13 @@
"OperandCount": 2,
"MemoryRead": "true"
},
{
"Name": "LoadManagedPointer",
"FamilyName": "IR",
"ResultCount": 1,
"OperandCount": 2,
"MemoryRead": "true"
},
{
"Name": "LoadSignExtend8x32",
"FamilyName": "IR",
Expand Down Expand Up @@ -608,6 +636,14 @@
"MemoryRead": "true",
"ParameterLoad": "true"
},
{
"Name": "LoadParamManagedPointer",
"FamilyName": "IR",
"ResultCount": 1,
"OperandCount": 1,
"MemoryRead": "true",
"ParameterLoad": "true"
},
{
"Name": "LoadParamR4",
"FamilyName": "IR",
Expand Down Expand Up @@ -876,6 +912,12 @@
"ResultCount": 1,
"OperandCount": 1
},
{
"Name": "MoveManagedPointer",
"FamilyName": "IR",
"ResultCount": 1,
"OperandCount": 1
},
{
"Name": "MulCarryOut32",
"FamilyName": "IR",
Expand Down Expand Up @@ -980,6 +1022,13 @@
"OperandCount": 0,
"VariableOperands": "true"
},
{
"Name": "PhiManagedPointer",
"FamilyName": "IR",
"ResultCount": 0,
"OperandCount": 0,
"VariableOperands": "true"
},
{
"Name": "Phi32",
"FamilyName": "IR",
Expand Down Expand Up @@ -1085,6 +1134,13 @@
"OperandCount": 1,
"FlowControl": "Return"
},
{
"Name": "SetReturnManagedPointer",
"FamilyName": "IR",
"ResultCount": 0,
"OperandCount": 1,
"FlowControl": "Return"
},
{
"Name": "SetReturnCompound",
"FamilyName": "IR",
Expand Down Expand Up @@ -1180,6 +1236,13 @@
"OperandCount": 3,
"MemoryWrite": "true"
},
{
"Name": "StoreManagedPointer",
"FamilyName": "IR",
"ResultCount": 0,
"OperandCount": 3,
"MemoryWrite": "true"
},
{
"Name": "StoreParamCompound",
"FamilyName": "IR",
Expand Down Expand Up @@ -1212,6 +1275,14 @@
"MemoryWrite": "true",
"ParameterStore": "true"
},
{
"Name": "StoreParamManagedPointer",
"FamilyName": "IR",
"ResultCount": 0,
"OperandCount": 2,
"MemoryWrite": "true",
"ParameterStore": "true"
},
{
"Name": "StoreParam8",
"FamilyName": "IR",
Expand Down Expand Up @@ -1268,6 +1339,12 @@
"ResultCount": 1,
"OperandCount": 2
},
{
"Name": "SubManagedPointer",
"FamilyName": "IR",
"ResultCount": 1,
"OperandCount": 2
},
{
"Name": "SubCarryOut32",
"FamilyName": "IR",
Expand Down Expand Up @@ -1469,6 +1546,12 @@
"ResultCount": 1,
"OperandCount": 3
},
{
"Name": "IfThenElseManagedPointer",
"FamilyName": "IR",
"ResultCount": 1,
"OperandCount": 3
},
{
"Name": "BitCopyR4To32",
"FamilyName": "IR",
Expand Down
8 changes: 8 additions & 0 deletions Source/Data/IR-Optimizations-ConstantMove.json
Original file line number Diff line number Diff line change
Expand Up @@ -18,6 +18,14 @@
"Filter": "IsResolvedConstant(a) & !IsResolvedConstant(b)",
"Result": "(IR.AddR# b a)"
},
{
"Type": "ConstantMove",
"Name": "AddManagedPointer",
"SubName": "",
"Expression": "IR.AddManagedPointer a b",
"Filter": "IsResolvedConstant(a) & !IsResolvedConstant(b)",
"Result": "(IR.AddManagedPointer b a)"
},
{
"Type": "ConstantMove",
"Name": "MulSigned##",
Expand Down
12 changes: 11 additions & 1 deletion Source/Data/IR-Optimizations-Rewrite.json
Original file line number Diff line number Diff line change
Expand Up @@ -26,7 +26,8 @@
"IR.Compare32x64",
"IR.Compare64x32",
"IR.Compare64x64",
"IR.CompareObject"
"IR.CompareObject",
"IR.CompareManagedPointer"
],
"Optimizations": [
{
Expand All @@ -38,6 +39,15 @@
"Result": "(IR.CompareObject {!= u} a b)",
"Variations": "Yes"
},
{
"Type": "Rewrite",
"Name": "CompareManagedPointer",
"SubName": "GreaterThanZero",
"Expression": "IR.CompareManagedPointer {> u} a b",
"Filter": "IsZero(b)",
"Result": "(IR.CompareManagedPointer {!= u} a b)",
"Variations": "Yes"
},
{
"Type": "Rewrite",
"Name": "Compare32x##",
Expand Down
26 changes: 26 additions & 0 deletions Source/Data/IR-Optimizations-Simplification.json
Original file line number Diff line number Diff line change
Expand Up @@ -40,6 +40,14 @@
"Filter": "",
"Result": "(IR.MoveObject a)"
},
{
"Type": "Simplification",
"Name": "MoveManagedPointer",
"SubName": "Coalescing",
"Expression": "IR.MoveManagedPointer (IR.MoveManagedPointer a)",
"Filter": "",
"Result": "(IR.MoveManagedPointer a)"
},
{
"Type": "Simplification",
"Name": "Not##",
Expand Down Expand Up @@ -264,6 +272,15 @@
"Result": "(IR.Move32 [To32(1)])",
"Variations": "Yes"
},
{
"Type": "Simplification",
"Name": "CompareManagedPointer",
"SubName": "SameAndEqual",
"Expression": "IR.CompareManagedPointer {==, >=, <=, >= u, <= u} a a",
"Filter": "",
"Result": "(IR.Move32 [To32(1)])",
"Variations": "Yes"
},
{
"Type": "Simplification",
"Name": "CompareObject",
Expand All @@ -273,6 +290,15 @@
"Result": "(IR.Move32 [To32(0)])",
"Variations": "Yes"
},
{
"Type": "Simplification",
"Name": "CompareManagedPointer",
"SubName": "SameAndNotEqual",
"Expression": "IR.CompareManagedPointer {!=, >, <, > u, < u} a a",
"Filter": "",
"Result": "(IR.Move32 [To32(0)])",
"Variations": "Yes"
},
{
"Type": "Simplification",
"Name": "Compare32x##",
Expand Down
29 changes: 29 additions & 0 deletions Source/Data/IR-Optimizations-StrengthReduction.json
Original file line number Diff line number Diff line change
Expand Up @@ -6,6 +6,7 @@
"IR.Add64",
"IR.AddR4",
"IR.AddR8",
"IR.AddManagedPointer",
"IR.And32",
"IR.And64",
"IR.Or32",
Expand Down Expand Up @@ -48,6 +49,16 @@
"Priority": "80",
"Variations": "Yes"
},
{
"Type": "StrengthReduction",
"Name": "AddManagedPointer",
"SubName": "Zero",
"Expression": "IR.AddManagedPointer a 0",
"Filter": "",
"Result": "(IR.MoveManagedPointer [To32(0)])",
"Priority": "80",
"Variations": "Yes"
},
{
"Type": "StrengthReduction",
"Name": "And32",
Expand Down Expand Up @@ -173,6 +184,24 @@
"Result": "(IR.Move## [To##(0)])",
"Priority": "80"
},
{
"Type": "StrengthReduction",
"Name": "SubManagedPointer",
"SubName": "ByZero",
"Expression": "IR.SubManagedPointer a 0",
"Filter": "",
"Result": "(IR.MoveManagedPointer a)",
"Priority": "80"
},
{
"Type": "StrengthReduction",
"Name": "SubManagedPointer",
"SubName": "Same",
"Expression": "IR.SubManagedPointer a a",
"Filter": "",
"Result": "(IR.MoveManagedPointer [To32(0)])",
"Priority": "80"
},
{
"Type": "StrengthReduction",
"Name": "Xor##",
Expand Down
9 changes: 4 additions & 5 deletions Source/Mosa.Compiler.Framework/BaseMethodCompilerStage.cs
Original file line number Diff line number Diff line change
Expand Up @@ -3,6 +3,7 @@
using System.Collections.Generic;
using System.Diagnostics;
using Mosa.Compiler.Common.Exceptions;
using Mosa.Compiler.Framework.IR;
using Mosa.Compiler.Framework.Linker;
using Mosa.Compiler.Framework.Trace;
using Mosa.Compiler.MosaTypeSystem;
Expand Down Expand Up @@ -720,6 +721,7 @@ public static bool IsMoveInstruction(BaseInstruction instruction)
return instruction == IRInstruction.Move32
|| instruction == IRInstruction.Move64
|| instruction == IRInstruction.MoveObject
|| instruction == IRInstruction.MoveManagedPointer
|| instruction == IRInstruction.MoveR8
|| instruction == IRInstruction.MoveR4;
}
Expand All @@ -731,6 +733,7 @@ public static bool IsCompareInstruction(BaseInstruction instruction)
|| instruction == IRInstruction.Compare64x32
|| instruction == IRInstruction.Compare64x64
|| instruction == IRInstruction.CompareObject
|| instruction == IRInstruction.CompareManagedPointer
|| instruction == IRInstruction.CompareR4
|| instruction == IRInstruction.CompareR8;
}
Expand All @@ -740,6 +743,7 @@ public static bool IsPhiInstruction(BaseInstruction instruction)
return instruction == IRInstruction.Phi32
|| instruction == IRInstruction.Phi64
|| instruction == IRInstruction.PhiObject
|| instruction == IRInstruction.PhiManagedPointer
|| instruction == IRInstruction.PhiR4
|| instruction == IRInstruction.PhiR8;
}
Expand Down Expand Up @@ -773,11 +777,6 @@ public List<BasicBlock> AddMissingBlocksIfRequired(List<BasicBlock> blocks)
return list;
}

protected BaseInstruction Select(BaseInstruction instruction32, BaseInstruction instruction64)
{
return Is32BitPlatform ? instruction32 : instruction64;
}

public static void ReplaceOperand(Operand target, Operand replacement)
{
foreach (var node in target.Uses.ToArray())
Expand Down
19 changes: 19 additions & 0 deletions Source/Mosa.Compiler.Framework/IR/AddManagedPointer.cs
Original file line number Diff line number Diff line change
@@ -0,0 +1,19 @@
// Copyright (c) MOSA Project. Licensed under the New BSD License.

// This code was generated by an automated template.

namespace Mosa.Compiler.Framework.IR;

/// <summary>
/// AddManagedPointer
/// </summary>
/// <seealso cref="Mosa.Compiler.Framework.IR.BaseIRInstruction" />
public sealed class AddManagedPointer : BaseIRInstruction
{
public AddManagedPointer()
: base(2, 1)
{
}

public override bool IsCommutative => true;
}
19 changes: 19 additions & 0 deletions Source/Mosa.Compiler.Framework/IR/BranchManagedPointer.cs
Original file line number Diff line number Diff line change
@@ -0,0 +1,19 @@
// Copyright (c) MOSA Project. Licensed under the New BSD License.

// This code was generated by an automated template.

namespace Mosa.Compiler.Framework.IR;

/// <summary>
/// BranchManagedPointer
/// </summary>
/// <seealso cref="Mosa.Compiler.Framework.IR.BaseIRInstruction" />
public sealed class BranchManagedPointer : BaseIRInstruction
{
public BranchManagedPointer()
: base(0, 2)
{
}

public override FlowControl FlowControl => FlowControl.ConditionalBranch;
}

0 comments on commit 4e9a435

Please sign in to comment.