Added comples test for ADDI

mrLSD · Oct 4, 2019 · d1ea164 · d1ea164
1 parent 4714eb4
commit d1ea164
Showing 1 changed file with 15 additions and 2 deletions.
diff --git a/Tests/Tests.fs b/Tests/Tests.fs
@@ -11,11 +11,24 @@ open ISA.RISCV.Decode
 
 [<Fact>]
 let ``ADDI to zero`` () =
-    let instr = 0x00300113L
+    // Init MachineState
     let addr = 0x80000000L
     let mstate = MachineState.InitMachineState Map.empty RV32i true
     let mstate = mstate.setPC 0x80000000L
+
+    // x2 = x0 + 3
+    let instr = 0x00300113L
     let decodedInstr = I.DecodeI instr
     Assert.NotEqual(decodedInstr, I.None)
     let mstate = ExecuteI.ExecuteI decodedInstr mstate
-    Assert.Equal(0x80000004L, mstate.PC)
+
+    // x3 = x2 + 5
+    let instr = 0x00510193L
+    let decodedInstr = I.DecodeI instr
+    Assert.NotEqual(decodedInstr, I.None)
+    let mstate = ExecuteI.ExecuteI decodedInstr mstate
+
+    Assert.Equal(mstate.getRegister 2, 3L)
+    Assert.Equal(mstate.getRegister 3, 8L)
+
+    Assert.Equal(addr + 8L, mstate.PC)