Must be dead code, no impact on test suite

myhdl · Mar 2, 2016 · c661323 · c661323
1 parent 9711dde
commit c661323
Showing 1 changed file with 0 additions and 6 deletions.
diff --git a/myhdl/conversion/_toVHDL.py b/myhdl/conversion/_toVHDL.py
@@ -654,10 +654,6 @@ def visit_BinOp(self, node):
             self.shiftOp(node)
         elif isinstance(node.op, (ast.BitAnd, ast.BitOr, ast.BitXor)):
             self.BitOp(node)
-        elif isinstance(node.op, ast.Mod) and (self.context == _context.PRINT):
-            self.visit(node.left)
-            self.write(", ")
-            self.visit(node.right)
         else:
             self.BinOp(node)
 
@@ -1362,9 +1358,7 @@ def visit_Print(self, node):
                     elif isinstance(a.vhdOri, vhd_enum):
                         a.vhd = vhd_string()
                 self.write("write(L, ")
-                self.context = _context.PRINT
                 self.visit(a)
-                self.context = None
                 if s.justified == 'LEFT':
                     self.write(", justified=>LEFT")
                 if s.width: