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variable declaration does not support an expression in 'range' in the list comprehension #178

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ixbidie opened this issue Jul 4, 2016 · 0 comments

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@ixbidie
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ixbidie commented Jul 4, 2016

For variables declarations, MyHDL does not seem to support having an expression in the call to range in the list comprehension (although it does for signal declarations).

It will lead to faulty VHDL code.

stack overflow question

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