PPU: delay H-blank IRQs by four cycles (fixes #89, #175)

nba-emu · Jul 10, 2022 · 5904211 · 5904211
1 parent 1187885
commit 5904211
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Showing 3 changed files with 26 additions and 13 deletions.
diff --git a/docs/ACCURACY.md b/docs/ACCURACY.md
@@ -15,7 +15,7 @@ Carry         |         93 |             93 |         93 |          93 |
 Multiply Long |         72 |             52 |         52 |          52 |        52 |         52 |
 BIOS math     |        615 |            615 |        615 |         615 |       615 |        615 |
 DMA tests     |       1256 |           1256 |       1232 |        1032 |      1212 |       1256 |
-Misc Edge Case|         10 |          4 - 5 |      7 - 8 |           7 |         1 |          3 |
+Misc Edge Case|         10 |              8 |      7 - 8 |           7 |         1 |          3 |
 Layer Toggle  |          1 |           pass |       fail |        pass |      fail |       pass |
 OAM Update    |          1 |           pass |       fail |        fail |      fail |       pass |
 
diff --git a/src/nba/src/hw/ppu/ppu.cpp b/src/nba/src/hw/ppu/ppu.cpp
@@ -126,14 +126,8 @@ void PPU::OnScanlineComplete(int cycles_late) {
   auto& bgpd = mmio.bgpd;
   auto& mosaic = mmio.mosaic;
 
-  scheduler.Add(226 - cycles_late, this, &PPU::OnHblankComplete);
-
   mmio.dispstat.hblank_flag = 1;
 
-  if (mmio.dispstat.hblank_irq_enable) {
-    irq.Raise(IRQ::Source::HBlank);
-  }
-
   dma.Request(DMA::Occasion::HBlank);
 
   if (mmio.vcount >= 2) {
@@ -179,6 +173,17 @@ void PPU::OnScanlineComplete(int cycles_late) {
    * But right now if we do that it breaks at least Pinball Tycoon.
    */
   LatchEnabledBGs();
+
+  scheduler.Add(4 - cycles_late, this, &PPU::OnHblankIRQTest);
+}
+
+void PPU::OnHblankIRQTest(int cycles_late) {
+  // TODO: confirm that the enable-bit is checked at 1010 and not 1006 cycles.
+  if (mmio.dispstat.hblank_irq_enable) {
+    irq.Raise(IRQ::Source::HBlank);
+  }
+
+  scheduler.Add(222 - cycles_late, this, &PPU::OnHblankComplete);
 }
 
 void PPU::OnHblankComplete(int cycles_late) {
@@ -224,8 +229,6 @@ void PPU::OnHblankComplete(int cycles_late) {
 void PPU::OnVblankScanlineComplete(int cycles_late) {
   auto& dispstat = mmio.dispstat;
 
-  scheduler.Add(226 - cycles_late, this, &PPU::OnVblankHblankComplete);
-
   dispstat.hblank_flag = 1;
 
   if (mmio.vcount < 162) {
@@ -234,10 +237,6 @@ void PPU::OnVblankScanlineComplete(int cycles_late) {
     dma.StopVideoXferDMA();
   }
 
-  if (dispstat.hblank_irq_enable) {
-    irq.Raise(IRQ::Source::HBlank);
-  }
-
   if (mmio.vcount >= 225) {
     /* TODO: it appears that this should really happen ~36 cycles into H-draw.
      * But right now if we do that it breaks at least Pinball Tycoon.
@@ -251,6 +250,17 @@ void PPU::OnVblankScanlineComplete(int cycles_late) {
       }
     }
   }
+
+  scheduler.Add(4 - cycles_late, this, &PPU::OnVblankHblankIRQTest);
+}
+
+void PPU::OnVblankHblankIRQTest(int cycles_late) {
+  // TODO: confirm that the enable-bit is checked at 1010 and not 1006 cycles.
+  if (mmio.dispstat.hblank_irq_enable) {
+    irq.Raise(IRQ::Source::HBlank);
+  }
+
+  scheduler.Add(222 - cycles_late, this, &PPU::OnVblankHblankComplete);
 }
 
 void PPU::OnVblankHblankComplete(int cycles_late) {

diff --git a/src/nba/src/hw/ppu/ppu.hpp b/src/nba/src/hw/ppu/ppu.hpp
@@ -193,9 +193,12 @@ struct PPU {
   void LatchEnabledBGs();
   void LatchBGXYWrites();
   void CheckVerticalCounterIRQ();
+
   void OnScanlineComplete(int cycles_late);
+  void OnHblankIRQTest(int cycles_late);
   void OnHblankComplete(int cycles_late);
   void OnVblankScanlineComplete(int cycles_late);
+  void OnVblankHblankIRQTest(int cycles_late);
   void OnVblankHblankComplete(int cycles_late);
 
   void RenderScanline(int vcount);