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Merge branch 'master' of steve-icarus@icarus.com:git/verilog
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steveicarus committed Sep 29, 2007
2 parents 5bb936a + 3258b77 commit bbf3116
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Showing 14 changed files with 78 additions and 643 deletions.
1 change: 1 addition & 0 deletions ivl.def
Expand Up @@ -134,6 +134,7 @@ ivl_scope_port
ivl_scope_ports
ivl_scope_sigs
ivl_scope_sig
ivl_scope_time_precision
ivl_scope_time_units
ivl_scope_type
ivl_scope_tname
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6 changes: 6 additions & 0 deletions ivl_target.h
Expand Up @@ -1408,6 +1408,11 @@ extern ivl_expr_t ivl_parameter_expr(ivl_parameter_t net);
* anything that can become and ivl_signal_t, include synthetic
* signals generated by the compiler.
*
* ivl_scope_time_precision
* Scopes have their own intrinsic time precision, typically from
* the timescale compiler directive. This method returns the
* precision as a signed power of 10 value.
*
* ivl_scope_time_units
* Scopes have their own intrinsic time units, typically from the
* timescale compiler directive. This method returns the units as a
Expand Down Expand Up @@ -1446,6 +1451,7 @@ extern unsigned ivl_scope_sigs(ivl_scope_t net);
extern ivl_signal_t ivl_scope_sig(ivl_scope_t net, unsigned idx);
extern ivl_scope_type_t ivl_scope_type(ivl_scope_t net);
extern const char* ivl_scope_tname(ivl_scope_t net);
extern int ivl_scope_time_precision(ivl_scope_t net);
extern int ivl_scope_time_units(ivl_scope_t net);


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234 changes: 6 additions & 228 deletions t-dll-api.cc
Expand Up @@ -1474,6 +1474,12 @@ extern "C" ivl_signal_t ivl_scope_sig(ivl_scope_t net, unsigned idx)
return net->sigs_[idx];
}

extern "C" int ivl_scope_time_precision(ivl_scope_t net)
{
assert(net);
return net->time_precision;
}

extern "C" int ivl_scope_time_units(ivl_scope_t net)
{
assert(net);
Expand Down Expand Up @@ -1963,231 +1969,3 @@ extern "C" ivl_statement_t ivl_stmt_sub_stmt(ivl_statement_t net)
return 0;
}

/*
* $Log: t-dll-api.cc,v $
* Revision 1.144 2007/04/02 01:12:34 steve
* Seperate arrayness from word count
*
* Revision 1.143 2007/03/26 16:51:48 steve
* do not calculate nexus name unless needed.
*
* Revision 1.142 2007/03/02 06:13:22 steve
* Add support for edge sensitive spec paths.
*
* Revision 1.141 2007/03/01 06:19:39 steve
* Add support for conditional specify delay paths.
*
* Revision 1.140 2007/01/17 05:00:12 steve
* Dead code for memories in scopes.
*
* Revision 1.139 2007/01/17 04:39:18 steve
* Remove dead code related to memories.
*
* Revision 1.138 2007/01/16 05:44:15 steve
* Major rework of array handling. Memories are replaced with the
* more general concept of arrays. The NetMemory and NetEMemory
* classes are removed from the ivl core program, and the IVL_LPM_RAM
* lpm type is removed from the ivl_target API.
*
* Revision 1.137 2006/09/23 04:57:19 steve
* Basic support for specify timing.
*
* Revision 1.136 2006/09/20 22:31:23 steve
* Remove dead code.
*
* Revision 1.135 2006/08/08 05:11:37 steve
* Handle 64bit delay constants.
*
* Revision 1.134 2006/06/18 04:15:50 steve
* Add support for system functions in continuous assignments.
*
* Revision 1.133 2006/02/02 02:43:59 steve
* Allow part selects of memory words in l-values.
*
* Revision 1.132 2006/01/02 05:33:19 steve
* Node delays can be more general expressions in structural contexts.
*
* Revision 1.131 2005/08/06 17:58:16 steve
* Implement bi-directional part selects.
*
* Revision 1.130 2005/07/11 16:56:51 steve
* Remove NetVariable and ivl_variable_t structures.
*
* Revision 1.129 2005/07/07 16:22:49 steve
* Generalize signals to carry types.
*
* Revision 1.128 2005/06/13 23:22:37 steve
* Fix compile errors.
*
* Revision 1.127 2005/05/24 01:44:28 steve
* Do sign extension of structuran nets.
*
* Revision 1.126 2005/05/08 23:44:08 steve
* Add support for variable part select.
*
* Revision 1.125 2005/04/24 23:44:02 steve
* Update DFF support to new data flow.
*
* Revision 1.124 2005/04/13 06:35:11 steve
* Make logic aware of strength.
*
* Revision 1.123 2005/04/06 05:29:08 steve
* Rework NetRamDq and IVL_LPM_RAM nodes.
*
* Revision 1.122 2005/04/01 06:04:30 steve
* Clean up handle of UDPs.
*
* Revision 1.121 2005/03/18 02:56:04 steve
* Add support for LPM_UFUNC user defined functions.
*
* Revision 1.120 2005/03/09 05:52:04 steve
* Handle case inequality in netlists.
*
* Revision 1.119 2005/02/19 02:43:38 steve
* Support shifts and divide.
*
* Revision 1.118 2005/02/12 06:25:40 steve
* Restructure NetMux devices to pass vectors.
* Generate NetMux devices from ternary expressions,
* Reduce NetMux devices to bufif when appropriate.
*
* Revision 1.117 2005/02/08 00:12:36 steve
* Add the NetRepeat node, and code generator support.
*
* Revision 1.116 2005/02/03 04:56:20 steve
* laborate reduction gates into LPM_RED_ nodes.
*
* Revision 1.115 2005/01/24 05:28:31 steve
* Remove the NetEBitSel and combine all bit/part select
* behavior into the NetESelect node and IVL_EX_SELECT
* ivl_target expression type.
*
* Revision 1.114 2005/01/22 01:06:55 steve
* Change case compare from logic to an LPM node.
*
* Revision 1.113 2005/01/09 20:16:01 steve
* Use PartSelect/PV and VP to handle part selects through ports.
*
* Revision 1.112 2004/12/29 23:55:43 steve
* Unify elaboration of l-values for all proceedural assignments,
* including assing, cassign and force.
*
* Generate NetConcat devices for gate outputs that feed into a
* vector results. Use this to hande gate arrays. Also let gate
* arrays handle vectors of gates when the outputs allow for it.
*
* Revision 1.111 2004/12/18 18:56:18 steve
* Add ivl_event_scope, and better document ivl_event_X methods.
*
* Revision 1.110 2004/12/15 17:10:40 steve
* Fixup force statement elaboration.
*
* Revision 1.109 2004/12/11 02:31:27 steve
* Rework of internals to carry vectors through nexus instead
* of single bits. Make the ivl, tgt-vvp and vvp initial changes
* down this path.
*
* Revision 1.108 2004/10/04 01:10:55 steve
* Clean up spurious trailing white space.
*
* Revision 1.107 2004/06/30 02:16:27 steve
* Implement signed divide and signed right shift in nets.
*
* Revision 1.106 2003/12/03 02:46:24 steve
* Add support for wait on list of named events.
*
* Revision 1.105 2003/11/10 20:59:03 steve
* Design::get_flag returns const char* instead of string.
*
* Revision 1.104 2003/09/03 23:33:30 steve
* Pass FF synchronous set values to code generator.
*
* Revision 1.103 2003/08/22 23:14:26 steve
* Preserve variable ranges all the way to the vpi.
*
* Revision 1.102 2003/08/15 02:23:53 steve
* Add synthesis support for synchronous reset.
*
* Revision 1.101 2003/06/24 01:38:03 steve
* Various warnings fixed.
*
* Revision 1.100 2003/06/23 01:25:44 steve
* Module attributes make it al the way to ivl_target.
*
* Revision 1.99 2003/05/14 05:26:41 steve
* Support real expressions in case statements.
*
* Revision 1.98 2003/04/22 04:48:30 steve
* Support event names as expressions elements.
*
* Revision 1.97 2003/04/11 05:18:08 steve
* Handle signed magnitude compare all the
* way through to the vvp code generator.
*
* Revision 1.96 2003/03/10 23:40:53 steve
* Keep parameter constants for the ivl_target API.
*
* Revision 1.95 2003/03/06 04:32:40 steve
* Wrong sense of need compared to have.
*
* Revision 1.94 2003/03/06 01:24:37 steve
* Obsolete the ivl_event_name function.
*
* Revision 1.93 2003/03/06 00:28:42 steve
* All NetObj objects have lex_string base names.
*
* Revision 1.92 2003/03/03 02:22:41 steve
* Scope names stored only as basename.
*
* Revision 1.91 2003/02/26 01:29:24 steve
* LPM objects store only their base names.
*
* Revision 1.90 2003/01/26 21:15:59 steve
* Rework expression parsing and elaboration to
* accommodate real/realtime values and expressions.
*
* Revision 1.89 2002/12/21 00:55:58 steve
* The $time system task returns the integer time
* scaled to the local units. Change the internal
* implementation of vpiSystemTime the $time functions
* to properly account for this. Also add $simtime
* to get the simulation time.
*
* Revision 1.88 2002/10/23 01:47:17 steve
* Fix synth2 handling of aset/aclr signals where
* flip-flops are split by begin-end blocks.
*
* Revision 1.87 2002/09/26 03:18:04 steve
* Generate vvp code for asynch set/reset of NetFF.
*
* Revision 1.86 2002/08/12 01:35:00 steve
* conditional ident string using autoconfig.
*
* Revision 1.85 2002/08/07 02:17:14 steve
* Dead code.
*
* Revision 1.84 2002/08/05 04:18:45 steve
* Store only the base name of memories.
*
* Revision 1.83 2002/07/05 21:26:17 steve
* Avoid emitting to vvp local net symbols.
*
* Revision 1.82 2002/06/21 04:59:35 steve
* Carry integerness throughout the compilation.
*
* Revision 1.81 2002/05/27 00:08:45 steve
* Support carrying the scope of named begin-end
* blocks down to the code generator, and have
* the vvp code generator use that to support disable.
*
* Revision 1.80 2002/05/26 01:39:03 steve
* Carry Verilog 2001 attributes with processes,
* all the way through to the ivl_target API.
*
* Divide signal reference counts between rval
* and lval references.
*
* Revision 1.79 2002/05/24 04:36:23 steve
* Verilog 2001 attriubtes on nets/wires.
*/

2 changes: 2 additions & 0 deletions t-dll.cc
Expand Up @@ -542,6 +542,7 @@ void dll_target::add_root(ivl_design_s &des_, const NetScope *s)
make_scope_parameters(root_, s);
root_->type_ = IVL_SCT_MODULE;
root_->tname_ = root_->name_;
root_->time_precision = s->time_precision();
root_->time_units = s->time_unit();
root_->nattr = s->attr_cnt();
root_->attr = fill_in_attributes(s);
Expand Down Expand Up @@ -2001,6 +2002,7 @@ void dll_target::scope(const NetScope*net)
scope->lpm_ = 0;
scope->def = 0;
make_scope_parameters(scope, net);
scope->time_precision = net->time_precision();
scope->time_units = net->time_unit();
scope->nattr = net->attr_cnt();
scope->attr = fill_in_attributes(net);
Expand Down

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