Fix default binding library search. Issue #154

src/elab.c

@@ -906,9 +906,14 @@ static tree_t elab_default_binding(tree_t inst, lib_t *new_lib,
 
    if (entity == NULL) {
       if (search_others && ctx->arch != NULL) {
-         const int nctx = tree_contexts(ctx->arch);
-         for (int i = 0; entity == NULL && i < nctx; i++) {
-            tree_t c = tree_context(ctx->arch, i);
+         tree_t elab_ent = tree_ref(ctx->arch);
+         const int nctxe = tree_contexts(elab_ent);
+         const int nctxa = tree_contexts(ctx->arch);
+         for (int i = 0; entity == NULL && i < nctxe + nctxa; i++) {
+            tree_t c = i < nctxe
+               ? tree_context(elab_ent, i)
+               : tree_context(ctx->arch, i - nctxe);
+
             if (tree_kind(c) != T_LIBRARY)
                continue;
 

test/elab/libbind2.vhd

@@ -0,0 +1,30 @@
+entity sub is
+    port ( x : out integer );
+end entity;
+
+architecture test of sub is
+begin
+    x <= 4;
+end architecture;
+
+-------------------------------------------------------------------------------
+
+library other;
+
+entity top is
+end entity;
+
+architecture test of top is
+
+    component sub is
+        port ( x : out integer );
+    end component;
+
+    signal x : integer;
+
+begin
+
+    sub_i: component sub
+        port map ( x => x );
+
+end architecture;

test/misc/bufr_test.vhd

@@ -0,0 +1,33 @@
+library ieee;
+use ieee.std_logic_1164.all;
+
+library unisim;
+use unisim.vcomponents.all;
+
+entity bufr_test is
+end entity;
+
+architecture test of bufr_test is
+    component BUFR
+        generic ( BUFR_DIVIDE : string := "BYPASS";
+                  SIM_DEVICE  : string := "7SERIES");
+        port (    O           : out STD_LOGIC;
+                  CE          : in  STD_LOGIC;
+                  CLR         : in  STD_LOGIC;
+                  I           : in  STD_LOGIC);
+    end component;
+    attribute BOX_TYPE of BUFR : component is "PRIMITIVE";
+
+    signal amu_adc_dco_i : std_logic;
+    signal amu_adc_dco   : std_logic;
+begin
+
+    BUF_DATA_CLK : BUFR
+        generic map (  BUFR_DIVIDE    => "BYPASS",
+                       SIM_DEVICE     => "7SERIES")
+        port map (  O              => amu_adc_dco,
+                    CE             => '1',
+                    CLR            => '0',
+                    I              => amu_adc_dco_i);
+
+end architecture;

test/test_elab.c

@@ -357,6 +357,22 @@ START_TEST(test_issue184)
 }
 END_TEST
 
+START_TEST(test_libbind2)
+{
+   input_from_file(TESTDIR "/elab/libbind2.vhd");
+
+   lib_t work = lib_work();
+
+   lib_t other = lib_tmp("other");
+   lib_set_work(other);
+   parse_check_and_simplify(T_ENTITY, T_ARCH, -1);
+   fail_if(sem_errors() > 0);
+
+   lib_set_work(work);
+   fail_if(run_elab() == NULL);
+}
+END_TEST
+
 int main(void)
 {
    Suite *s = suite_create("elab");
@@ -384,6 +400,7 @@ int main(void)
    tcase_add_test(tc, test_issue159);
    tcase_add_test(tc, test_issue175);
    tcase_add_test(tc, test_issue184);
+   tcase_add_test(tc, test_libbind2);
    suite_add_tcase(s, tc);
 
    return nvc_run_test(s);