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feat: Allow nested arrays and vectors in Brillig foreign calls (AztecProtocol/aztec-packages#4478)
feat: allow brillig to read arrays directly from memory (AztecProtocol/aztec-packages#4460)
feat(avm): back in avm context with macro - refactor context (AztecProtocol/aztec-packages#4438)
chore!: rename bigint_neg into bigint_sub (AztecProtocol/aztec-packages#4420)
chore: add bigint solver in ACVM and add a unit test for bigints in Noir (AztecProtocol/aztec-packages#4415)
feat!: Add expression width into acir (AztecProtocol/aztec-packages#4014)
feat: Add bit size to const opcode (AztecProtocol/aztec-packages#4385)
feat(aztec-nr): initial work for aztec public vm macro (AztecProtocol/aztec-packages#4400)
chore: surpress chained macro warning (AztecProtocol/aztec-packages#4396)
feat!: init storage macro (AztecProtocol/aztec-packages#4200)
chore(acir)!: Move `is_recursive` flag to be part of the circuit definition (AztecProtocol/aztec-packages#4221)
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Showing 61 changed files with 2,332 additions and 855 deletions.
1,438 changes: 914 additions & 524 deletions acvm-repo/acir/codegen/acir.cpp
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6 changes: 3 additions & 3 deletions acvm-repo/acir/src/circuit/black_box_functions.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -50,7 +50,7 @@ pub enum BlackBoxFunc {
/// BigInt addition
BigIntAdd,
/// BigInt subtraction
BigIntNeg,
BigIntSub,
/// BigInt multiplication
BigIntMul,
/// BigInt division
Expand Down Expand Up @@ -91,7 +91,7 @@ impl BlackBoxFunc {
BlackBoxFunc::RecursiveAggregation => "recursive_aggregation",
BlackBoxFunc::EcdsaSecp256r1 => "ecdsa_secp256r1",
BlackBoxFunc::BigIntAdd => "bigint_add",
BlackBoxFunc::BigIntNeg => "bigint_neg",
BlackBoxFunc::BigIntSub => "bigint_sub",
BlackBoxFunc::BigIntMul => "bigint_mul",
BlackBoxFunc::BigIntDiv => "bigint_div",
BlackBoxFunc::BigIntFromLeBytes => "bigint_from_le_bytes",
Expand Down Expand Up @@ -120,7 +120,7 @@ impl BlackBoxFunc {
"keccakf1600" => Some(BlackBoxFunc::Keccakf1600),
"recursive_aggregation" => Some(BlackBoxFunc::RecursiveAggregation),
"bigint_add" => Some(BlackBoxFunc::BigIntAdd),
"bigint_neg" => Some(BlackBoxFunc::BigIntNeg),
"bigint_sub" => Some(BlackBoxFunc::BigIntSub),
"bigint_mul" => Some(BlackBoxFunc::BigIntMul),
"bigint_div" => Some(BlackBoxFunc::BigIntDiv),
"bigint_from_le_bytes" => Some(BlackBoxFunc::BigIntFromLeBytes),
Expand Down
2 changes: 2 additions & 0 deletions acvm-repo/acir/src/circuit/brillig.rs
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Original file line number Diff line number Diff line change
@@ -1,3 +1,4 @@
use super::opcodes::BlockId;
use crate::native_types::{Expression, Witness};
use brillig::Opcode as BrilligOpcode;
use serde::{Deserialize, Serialize};
Expand All @@ -8,6 +9,7 @@ use serde::{Deserialize, Serialize};
pub enum BrilligInputs {
Single(Expression),
Array(Vec<Expression>),
MemoryArray(BlockId),
}

/// Outputs for the Brillig VM. Once the VM has completed
Expand Down
22 changes: 21 additions & 1 deletion acvm-repo/acir/src/circuit/mod.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -15,12 +15,30 @@ use serde::{de::Error as DeserializationError, Deserialize, Deserializer, Serial

use std::collections::BTreeSet;

/// Specifies the maximum width of the expressions which will be constrained.
///
/// Unbounded Expressions are useful if you are eventually going to pass the ACIR
/// into a proving system which supports R1CS.
///
/// Bounded Expressions are useful if you are eventually going to pass the ACIR
/// into a proving system which supports PLONK, where arithmetic expressions have a
/// finite fan-in.
#[derive(Debug, Clone, Copy, PartialEq, Eq, Serialize, Deserialize, Default)]
pub enum ExpressionWidth {
#[default]
Unbounded,
Bounded {
width: usize,
},
}

#[derive(Clone, PartialEq, Eq, Serialize, Deserialize, Default)]
pub struct Circuit {
// current_witness_index is the highest witness index in the circuit. The next witness to be added to this circuit
// will take on this value. (The value is cached here as an optimization.)
pub current_witness_index: u32,
pub opcodes: Vec<Opcode>,
pub expression_width: ExpressionWidth,

/// The set of private inputs to the circuit.
pub private_parameters: BTreeSet<Witness>,
Expand Down Expand Up @@ -240,7 +258,7 @@ mod tests {
opcodes::{BlackBoxFuncCall, FunctionInput},
Circuit, Compression, Opcode, PublicInputs,
};
use crate::native_types::Witness;
use crate::{circuit::ExpressionWidth, native_types::Witness};
use acir_field::FieldElement;

fn and_opcode() -> Opcode {
Expand Down Expand Up @@ -318,6 +336,7 @@ mod tests {
fn serialization_roundtrip() {
let circuit = Circuit {
current_witness_index: 5,
expression_width: ExpressionWidth::Unbounded,
opcodes: vec![and_opcode(), range_opcode()],
private_parameters: BTreeSet::new(),
public_parameters: PublicInputs(BTreeSet::from_iter(vec![Witness(2), Witness(12)])),
Expand All @@ -340,6 +359,7 @@ mod tests {
fn test_serialize() {
let circuit = Circuit {
current_witness_index: 0,
expression_width: ExpressionWidth::Unbounded,
opcodes: vec![
Opcode::AssertZero(crate::native_types::Expression {
mul_terms: vec![],
Expand Down
8 changes: 4 additions & 4 deletions acvm-repo/acir/src/circuit/opcodes/black_box_function_call.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -120,7 +120,7 @@ pub enum BlackBoxFuncCall {
rhs: u32,
output: u32,
},
BigIntNeg {
BigIntSub {
lhs: u32,
rhs: u32,
output: u32,
Expand Down Expand Up @@ -193,7 +193,7 @@ impl BlackBoxFuncCall {
BlackBoxFuncCall::Keccakf1600 { .. } => BlackBoxFunc::Keccakf1600,
BlackBoxFuncCall::RecursiveAggregation { .. } => BlackBoxFunc::RecursiveAggregation,
BlackBoxFuncCall::BigIntAdd { .. } => BlackBoxFunc::BigIntAdd,
BlackBoxFuncCall::BigIntNeg { .. } => BlackBoxFunc::BigIntNeg,
BlackBoxFuncCall::BigIntSub { .. } => BlackBoxFunc::BigIntSub,
BlackBoxFuncCall::BigIntMul { .. } => BlackBoxFunc::BigIntMul,
BlackBoxFuncCall::BigIntDiv { .. } => BlackBoxFunc::BigIntDiv,
BlackBoxFuncCall::BigIntFromLeBytes { .. } => BlackBoxFunc::BigIntFromLeBytes,
Expand Down Expand Up @@ -223,7 +223,7 @@ impl BlackBoxFuncCall {
vec![*lhs, *rhs]
}
BlackBoxFuncCall::BigIntAdd { .. }
| BlackBoxFuncCall::BigIntNeg { .. }
| BlackBoxFuncCall::BigIntSub { .. }
| BlackBoxFuncCall::BigIntMul { .. }
| BlackBoxFuncCall::BigIntDiv { .. }
| BlackBoxFuncCall::BigIntToLeBytes { .. } => Vec::new(),
Expand Down Expand Up @@ -328,7 +328,7 @@ impl BlackBoxFuncCall {
| BlackBoxFuncCall::RecursiveAggregation { .. }
| BlackBoxFuncCall::BigIntFromLeBytes { .. }
| BlackBoxFuncCall::BigIntAdd { .. }
| BlackBoxFuncCall::BigIntNeg { .. }
| BlackBoxFuncCall::BigIntSub { .. }
| BlackBoxFuncCall::BigIntMul { .. }
| BlackBoxFuncCall::BigIntDiv { .. } => {
vec![]
Expand Down
2 changes: 1 addition & 1 deletion acvm-repo/acir/src/circuit/opcodes/memory_operation.rs
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Original file line number Diff line number Diff line change
@@ -1,7 +1,7 @@
use crate::native_types::{Expression, Witness};
use serde::{Deserialize, Serialize};

#[derive(Clone, PartialEq, Eq, Serialize, Deserialize, Hash, Copy, Default)]
#[derive(Clone, Debug, PartialEq, Eq, Serialize, Deserialize, Hash, Copy, Default)]
pub struct BlockId(pub u32);

/// Operation on a block of memory
Expand Down
9 changes: 7 additions & 2 deletions acvm-repo/acir/src/lib.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -31,15 +31,18 @@ mod reflection {
path::{Path, PathBuf},
};

use brillig::{BinaryFieldOp, BinaryIntOp, BlackBoxOp, Opcode as BrilligOpcode, ValueOrArray};
use brillig::{
BinaryFieldOp, BinaryIntOp, BlackBoxOp, HeapValueType, Opcode as BrilligOpcode,
ValueOrArray,
};
use serde_reflection::{Tracer, TracerConfig};

use crate::{
circuit::{
brillig::{BrilligInputs, BrilligOutputs},
directives::Directive,
opcodes::BlackBoxFuncCall,
Circuit, Opcode, OpcodeLocation,
Circuit, ExpressionWidth, Opcode, OpcodeLocation,
},
native_types::{Witness, WitnessMap},
};
Expand All @@ -57,6 +60,7 @@ mod reflection {

let mut tracer = Tracer::new(TracerConfig::default());
tracer.trace_simple_type::<Circuit>().unwrap();
tracer.trace_simple_type::<ExpressionWidth>().unwrap();
tracer.trace_simple_type::<Opcode>().unwrap();
tracer.trace_simple_type::<OpcodeLocation>().unwrap();
tracer.trace_simple_type::<BinaryFieldOp>().unwrap();
Expand All @@ -68,6 +72,7 @@ mod reflection {
tracer.trace_simple_type::<BlackBoxOp>().unwrap();
tracer.trace_simple_type::<Directive>().unwrap();
tracer.trace_simple_type::<ValueOrArray>().unwrap();
tracer.trace_simple_type::<HeapValueType>().unwrap();

let registry = tracer.registry().unwrap();

Expand Down
106 changes: 59 additions & 47 deletions acvm-repo/acir/tests/test_program_serialization.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -20,7 +20,7 @@ use acir::{
native_types::{Expression, Witness},
};
use acir_field::FieldElement;
use brillig::{HeapArray, MemoryAddress, ValueOrArray};
use brillig::{HeapArray, HeapValueType, MemoryAddress, ValueOrArray};

#[test]
fn addition_circuit() {
Expand All @@ -45,12 +45,12 @@ fn addition_circuit() {
let bytes = Circuit::serialize_circuit(&circuit);

let expected_serialization: Vec<u8> = vec![
31, 139, 8, 0, 0, 0, 0, 0, 0, 255, 173, 144, 187, 13, 192, 32, 12, 68, 249, 100, 32, 27,
219, 96, 119, 89, 37, 40, 176, 255, 8, 17, 18, 5, 74, 202, 240, 154, 235, 158, 238, 238,
112, 206, 121, 247, 37, 206, 60, 103, 194, 63, 208, 111, 116, 133, 197, 69, 144, 153, 91,
73, 13, 9, 47, 72, 86, 85, 128, 165, 102, 69, 69, 81, 185, 147, 18, 53, 101, 45, 86, 173,
128, 33, 83, 195, 46, 70, 125, 202, 226, 190, 94, 16, 166, 103, 108, 13, 203, 151, 254,
245, 233, 224, 1, 1, 52, 166, 127, 120, 1, 0, 0,
31, 139, 8, 0, 0, 0, 0, 0, 0, 255, 173, 208, 49, 14, 192, 32, 8, 5, 80, 212, 30, 8, 4, 20,
182, 94, 165, 166, 122, 255, 35, 52, 77, 28, 76, 58, 214, 191, 124, 166, 23, 242, 15, 0, 8,
240, 77, 154, 125, 206, 198, 127, 161, 176, 209, 138, 139, 197, 88, 68, 122, 205, 157, 152,
46, 204, 222, 76, 81, 180, 21, 35, 35, 53, 189, 179, 49, 119, 19, 171, 222, 188, 162, 147,
112, 167, 161, 206, 99, 98, 105, 223, 95, 248, 26, 113, 90, 97, 185, 97, 217, 56, 173, 35,
63, 243, 81, 87, 163, 125, 1, 0, 0,
];

assert_eq!(bytes, expected_serialization)
Expand All @@ -75,9 +75,9 @@ fn fixed_base_scalar_mul_circuit() {
let bytes = Circuit::serialize_circuit(&circuit);

let expected_serialization: Vec<u8> = vec![
31, 139, 8, 0, 0, 0, 0, 0, 0, 255, 77, 138, 91, 10, 0, 48, 12, 194, 178, 215, 215, 46, 189,
163, 175, 165, 10, 21, 36, 10, 57, 192, 160, 146, 188, 226, 139, 78, 113, 69, 183, 190, 61,
111, 218, 182, 231, 124, 122, 8, 177, 65, 92, 0, 0, 0,
31, 139, 8, 0, 0, 0, 0, 0, 0, 255, 77, 138, 91, 10, 0, 32, 16, 2, 109, 171, 175, 46, 221,
209, 247, 229, 130, 130, 140, 200, 92, 0, 11, 157, 228, 35, 127, 212, 200, 29, 61, 116, 76,
220, 217, 250, 171, 91, 113, 160, 66, 104, 242, 97, 0, 0, 0,
];

assert_eq!(bytes, expected_serialization)
Expand All @@ -102,9 +102,9 @@ fn pedersen_circuit() {
let bytes = Circuit::serialize_circuit(&circuit);

let expected_serialization: Vec<u8> = vec![
31, 139, 8, 0, 0, 0, 0, 0, 0, 255, 93, 138, 9, 10, 0, 64, 8, 2, 103, 15, 232, 255, 31, 142,
138, 10, 34, 65, 84, 198, 15, 28, 82, 145, 178, 182, 86, 191, 238, 183, 24, 131, 205, 79,
203, 0, 166, 242, 158, 93, 92, 0, 0, 0,
31, 139, 8, 0, 0, 0, 0, 0, 0, 255, 93, 74, 135, 9, 0, 48, 8, 75, 171, 224, 255, 15, 139,
27, 196, 64, 200, 100, 0, 15, 133, 80, 57, 89, 219, 127, 39, 173, 126, 235, 236, 247, 151,
48, 224, 71, 90, 33, 97, 0, 0, 0,
];

assert_eq!(bytes, expected_serialization)
Expand Down Expand Up @@ -143,22 +143,22 @@ fn schnorr_verify_circuit() {
let bytes = Circuit::serialize_circuit(&circuit);

let expected_serialization: Vec<u8> = vec![
31, 139, 8, 0, 0, 0, 0, 0, 0, 255, 77, 210, 87, 78, 2, 1, 20, 134, 209, 177, 247, 222, 123,
71, 68, 68, 68, 68, 68, 68, 68, 68, 68, 221, 133, 251, 95, 130, 145, 27, 206, 36, 78, 50,
57, 16, 94, 200, 253, 191, 159, 36, 73, 134, 146, 193, 19, 142, 243, 183, 255, 14, 179,
233, 247, 145, 254, 59, 217, 127, 71, 57, 198, 113, 78, 48, 125, 167, 56, 205, 25, 206,
114, 142, 243, 92, 224, 34, 151, 184, 204, 21, 174, 114, 141, 235, 220, 224, 38, 183, 184,
205, 29, 238, 114, 143, 251, 60, 224, 33, 143, 120, 204, 19, 158, 242, 140, 25, 158, 51,
203, 11, 230, 120, 201, 60, 175, 88, 224, 53, 139, 188, 97, 137, 183, 44, 243, 142, 21,
222, 179, 202, 7, 214, 248, 200, 58, 159, 216, 224, 51, 155, 124, 97, 235, 223, 142, 241,
188, 250, 222, 230, 27, 59, 124, 103, 151, 31, 236, 241, 147, 95, 252, 246, 57, 158, 104,
47, 186, 139, 214, 162, 179, 104, 44, 250, 74, 219, 154, 242, 63, 162, 165, 232, 40, 26,
138, 126, 162, 157, 232, 38, 154, 137, 94, 162, 149, 232, 36, 26, 137, 62, 162, 141, 232,
34, 154, 136, 30, 162, 133, 232, 32, 26, 136, 253, 99, 251, 195, 100, 176, 121, 236, 29,
91, 159, 218, 56, 99, 219, 172, 77, 115, 182, 204, 219, 176, 96, 187, 162, 205, 74, 182,
42, 219, 168, 98, 155, 170, 77, 106, 182, 168, 219, 160, 225, 246, 77, 55, 111, 185, 113,
219, 109, 59, 110, 218, 117, 203, 158, 27, 166, 55, 75, 239, 150, 184, 101, 250, 252, 1,
55, 204, 92, 74, 220, 3, 0, 0,
31, 139, 8, 0, 0, 0, 0, 0, 0, 255, 77, 210, 7, 74, 3, 1, 20, 69, 209, 177, 247, 222, 123,
239, 189, 119, 141, 93, 99, 220, 133, 251, 95, 130, 152, 103, 78, 32, 3, 195, 33, 4, 66,
248, 239, 254, 20, 69, 209, 84, 212, 158, 216, 206, 223, 234, 219, 204, 146, 239, 91, 170,
111, 103, 245, 109, 101, 27, 219, 217, 193, 250, 219, 197, 110, 246, 176, 151, 125, 236,
231, 0, 7, 57, 196, 97, 142, 112, 148, 99, 28, 231, 4, 39, 57, 197, 105, 206, 112, 150,
115, 156, 231, 2, 23, 185, 196, 101, 174, 112, 149, 107, 92, 231, 6, 55, 185, 197, 109,
238, 112, 151, 123, 220, 231, 1, 15, 121, 196, 99, 158, 240, 148, 103, 60, 231, 5, 47, 121,
197, 107, 222, 240, 150, 119, 188, 231, 3, 75, 124, 228, 83, 195, 142, 121, 158, 125, 126,
225, 43, 223, 248, 206, 15, 126, 178, 204, 47, 86, 248, 237, 119, 43, 76, 127, 105, 47,
189, 165, 181, 116, 150, 198, 234, 125, 117, 249, 47, 233, 41, 45, 165, 163, 52, 148, 126,
210, 78, 186, 73, 51, 233, 37, 173, 164, 147, 52, 146, 62, 210, 70, 186, 72, 19, 233, 33,
45, 164, 131, 52, 144, 253, 23, 139, 218, 238, 217, 60, 123, 103, 235, 236, 156, 141, 179,
239, 166, 93, 183, 237, 185, 107, 199, 125, 251, 29, 218, 237, 216, 94, 167, 118, 58, 183,
207, 165, 93, 174, 237, 113, 107, 135, 123, 247, 47, 185, 251, 147, 59, 191, 184, 239, 155,
187, 126, 184, 103, 217, 29, 235, 55, 171, 223, 173, 104, 184, 231, 255, 243, 7, 236, 52,
239, 128, 225, 3, 0, 0,
];

assert_eq!(bytes, expected_serialization)
Expand Down Expand Up @@ -186,7 +186,9 @@ fn simple_brillig_foreign_call() {
brillig::Opcode::ForeignCall {
function: "invert".into(),
destinations: vec![ValueOrArray::MemoryAddress(MemoryAddress::from(0))],
destination_value_types: vec![HeapValueType::Simple],
inputs: vec![ValueOrArray::MemoryAddress(MemoryAddress::from(0))],
input_value_types: vec![HeapValueType::Simple],
},
brillig::Opcode::Stop { return_data_offset: 0, return_data_size: 1 },
],
Expand All @@ -204,11 +206,11 @@ fn simple_brillig_foreign_call() {
let bytes = Circuit::serialize_circuit(&circuit);

let expected_serialization: Vec<u8> = vec![
31, 139, 8, 0, 0, 0, 0, 0, 0, 255, 173, 143, 177, 10, 192, 32, 12, 68, 207, 148, 150, 118,
234, 175, 216, 63, 232, 207, 116, 232, 210, 161, 136, 223, 175, 98, 132, 27, 212, 69, 31,
132, 28, 23, 8, 119, 59, 0, 131, 204, 66, 154, 41, 222, 173, 219, 142, 113, 153, 121, 191,
44, 231, 21, 237, 144, 88, 43, 249, 11, 71, 156, 77, 245, 251, 249, 231, 119, 189, 214,
204, 89, 187, 11, 25, 130, 54, 1, 36, 1, 124, 242, 107, 1, 0, 0,
31, 139, 8, 0, 0, 0, 0, 0, 0, 255, 173, 143, 65, 10, 192, 32, 12, 4, 215, 148, 150, 246,
212, 175, 216, 31, 244, 51, 61, 244, 226, 65, 196, 247, 171, 24, 33, 136, 122, 209, 129,
144, 176, 132, 101, 247, 4, 160, 144, 217, 196, 45, 41, 218, 203, 91, 207, 241, 168, 117,
94, 90, 230, 37, 238, 144, 216, 27, 249, 11, 87, 156, 131, 239, 223, 248, 207, 186, 81,
235, 150, 67, 173, 221, 189, 95, 18, 34, 97, 64, 0, 116, 135, 40, 214, 136, 1, 0, 0,
];

assert_eq!(bytes, expected_serialization)
Expand Down Expand Up @@ -258,6 +260,7 @@ fn complex_brillig_foreign_call() {
brillig::Opcode::Const {
destination: MemoryAddress(0),
value: brillig::Value::from(32_usize),
bit_size: 32,
},
brillig::Opcode::CalldataCopy {
destination_address: MemoryAddress(1),
Expand All @@ -271,11 +274,20 @@ fn complex_brillig_foreign_call() {
ValueOrArray::HeapArray(HeapArray { pointer: 0.into(), size: 3 }),
ValueOrArray::MemoryAddress(MemoryAddress::from(1)),
],
input_value_types: vec![
HeapValueType::Array { size: 3, value_types: vec![HeapValueType::Simple] },
HeapValueType::Simple,
],
destinations: vec![
ValueOrArray::HeapArray(HeapArray { pointer: 0.into(), size: 3 }),
ValueOrArray::MemoryAddress(MemoryAddress::from(35)),
ValueOrArray::MemoryAddress(MemoryAddress::from(36)),
],
destination_value_types: vec![
HeapValueType::Array { size: 3, value_types: vec![HeapValueType::Simple] },
HeapValueType::Simple,
HeapValueType::Simple,
],
},
brillig::Opcode::Stop { return_data_offset: 32, return_data_size: 5 },
],
Expand All @@ -293,14 +305,15 @@ fn complex_brillig_foreign_call() {
let bytes = Circuit::serialize_circuit(&circuit);

let expected_serialization: Vec<u8> = vec![
31, 139, 8, 0, 0, 0, 0, 0, 0, 255, 213, 83, 65, 10, 132, 48, 12, 76, 218, 237, 174, 123,
242, 11, 130, 62, 160, 250, 2, 255, 34, 222, 20, 61, 250, 124, 11, 78, 49, 4, 193, 131, 21,
52, 16, 210, 132, 105, 50, 77, 210, 140, 136, 152, 54, 177, 65, 13, 206, 12, 95, 74, 196,
181, 176, 254, 154, 212, 156, 46, 151, 191, 139, 163, 121, 1, 71, 123, 3, 199, 184, 15, 15,
157, 119, 202, 185, 36, 237, 159, 61, 248, 63, 159, 160, 46, 232, 23, 254, 15, 54, 67, 156,
96, 11, 213, 119, 82, 248, 116, 179, 104, 188, 163, 125, 15, 89, 213, 253, 139, 154, 221,
52, 206, 67, 191, 88, 5, 213, 52, 75, 113, 174, 96, 205, 201, 157, 24, 207, 197, 211, 157,
6, 50, 18, 233, 158, 72, 89, 1, 53, 215, 75, 175, 196, 4, 0, 0,
31, 139, 8, 0, 0, 0, 0, 0, 0, 255, 213, 84, 73, 14, 131, 48, 12, 28, 147, 166, 165, 167,
126, 161, 82, 251, 128, 180, 47, 224, 47, 85, 111, 32, 56, 242, 124, 130, 24, 68, 176, 2,
23, 130, 4, 35, 89, 206, 50, 137, 71, 182, 147, 28, 128, 96, 128, 241, 150, 113, 44, 156,
135, 24, 121, 5, 189, 219, 134, 143, 164, 187, 203, 237, 165, 49, 59, 129, 70, 179, 131,
198, 177, 31, 14, 90, 239, 148, 117, 73, 154, 63, 19, 121, 63, 23, 111, 214, 219, 149, 243,
27, 125, 206, 117, 208, 63, 85, 222, 161, 248, 32, 167, 72, 162, 245, 235, 44, 166, 94, 20,
21, 251, 30, 196, 253, 213, 85, 83, 254, 91, 163, 168, 90, 234, 43, 24, 191, 213, 190, 172,
156, 235, 17, 126, 59, 49, 142, 68, 120, 75, 220, 7, 166, 84, 90, 68, 72, 194, 139, 180,
136, 25, 58, 46, 103, 45, 188, 25, 5, 0, 0,
];

assert_eq!(bytes, expected_serialization)
Expand Down Expand Up @@ -332,11 +345,10 @@ fn memory_op_circuit() {
let bytes = Circuit::serialize_circuit(&circuit);

let expected_serialization: Vec<u8> = vec![
31, 139, 8, 0, 0, 0, 0, 0, 0, 255, 213, 146, 49, 14, 0, 32, 8, 3, 139, 192, 127, 240, 7,
254, 255, 85, 198, 136, 9, 131, 155, 48, 216, 165, 76, 77, 57, 80, 0, 140, 45, 117, 111,
238, 228, 179, 224, 174, 225, 110, 111, 234, 213, 185, 148, 156, 203, 121, 89, 86, 13, 215,
126, 131, 43, 153, 187, 115, 40, 185, 62, 153, 3, 136, 83, 60, 30, 96, 2, 12, 235, 225,
124, 14, 3, 0, 0,
31, 139, 8, 0, 0, 0, 0, 0, 0, 255, 213, 145, 187, 17, 0, 32, 8, 67, 195, 111, 31, 220, 192,
253, 167, 178, 144, 2, 239, 236, 132, 194, 52, 129, 230, 93, 8, 6, 64, 176, 101, 225, 28,
78, 49, 43, 238, 154, 225, 254, 166, 209, 205, 165, 98, 174, 212, 177, 188, 187, 92, 255,
173, 92, 173, 190, 93, 82, 80, 78, 123, 14, 127, 60, 97, 1, 210, 144, 46, 242, 19, 3, 0, 0,
];

assert_eq!(bytes, expected_serialization)
Expand Down
4 changes: 1 addition & 3 deletions acvm-repo/acvm/src/compiler/mod.rs
View file
Original file line number Diff line number Diff line change
@@ -1,8 +1,6 @@
use std::collections::HashMap;

use acir::circuit::{Circuit, OpcodeLocation};

use crate::ExpressionWidth;
use acir::circuit::{Circuit, ExpressionWidth, OpcodeLocation};

// The various passes that we can use over ACIR
mod optimizers;
Expand Down
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