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PM Recv FFDC: Base changes for PPE State and OCC Plat
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Change to
1. enable collection of PPE XIRS, SPRs, GPRs to respective
2. create and collect OCC plat traces for OCC, GPE0/1 & Shared

to respective regions in HOMER PM FFDC sections

Change-Id: I4ee1314450b72818e4b3ba44558e1359a1a2df08
RTC: 180382
RTC: 180553
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/47120
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: Prem Shanker Jha <premjha2@in.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: RANGANATHPRASAD G. BRAHMASAMUDRA <prasadbgr@in.ibm.com>
Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/47127
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
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@am10dolkar @crgeddes
am10dolkar authored and crgeddes committed Oct 9, 2017
1 parent d0605e8 commit 6072cd8
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Showing 13 changed files with 626 additions and 50 deletions.
16 changes: 12 additions & 4 deletions src/import/chips/p9/procedures/hwp/lib/p9_hcd_memmap_base.H
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Original file line number Diff line number Diff line change
Expand Up @@ -543,14 +543,13 @@ HCD_CONST(PGPE_IMAGE_RESERVE_SIZE,
HCD_CONST(FFDC_CME_MAGIC_NUM, (0x434d455f)) //"CME_"
HCD_CONST(FFDC_SGPE_MAGIC_NUM, (0x53475045)) //"SGPE"
HCD_CONST(FFDC_PGPE_MAGIC_NUM, (0x50475045)) //"PGPE"
HCD_CONST(FFDC_OCC_MAGIC_NUM, (0x4f43435f)) //"OCC_"

//FFDC Region Layout
HCD_CONST(FFDC_PPE_SCORE_BOARD_SIZE, 0x200)
HCD_CONST(FFDC_PPE_IMG_HDR_SIZE, 0x80)
HCD_CONST(FFDC_PPE_XIR_SIZE, 0x28)
HCD_CONST(FFDC_PPE_SPR_SIZE, 0x80)
HCD_CONST(FFDC_PPE_MAJOR_SPR_SIZE, 0x38)
HCD_CONST(FFDC_PPE_MINOR_SPR_SIZE, 0x38)
HCD_CONST(FFDC_PPE_GPR_SIZE, 0x80)
HCD_CONST(FFDC_PPE_INTERNAL_REG_SIZE, 0x78)
HCD_CONST(FFDC_PPE_TRACES_SIZE, 0x200)
Expand All @@ -563,15 +562,24 @@ HCD_CONST(FFDC_HOMER_TOP_HEADER , 0x38)
HCD_CONST(FFDC_QUAD_REGION_SIZE, 0x10E8)
HCD_CONST(FFDC_SGPE_REGION_SIZE, (FFDC_PPE_BLOCK_SIZE))
HCD_CONST(FFDC_PGPE_REGION_SIZE, (FFDC_PPE_BLOCK_SIZE))
HCD_CONST(FFDC_OCC_REGION_SIZE, 0x8610)
HCD_CONST(FFDC_OCC_REGION_HDR_SIZE, 0x10)
HCD_CONST(FFDC_OCC_REGION_HDR_SIZE, 0x18)
HCD_CONST(FFDC_TRACE_ERR_SIZE, (8 * ONE_KB))
HCD_CONST(FFDC_TRACE_IMP_SIZE, (FFDC_TRACE_ERR_SIZE))
HCD_CONST(FFDC_TRACE_INF_SIZE, (FFDC_TRACE_ERR_SIZE))
HCD_CONST(FFDC_TRACE_SSX_SIZE , (FFDC_TRACE_ERR_SIZE))
HCD_CONST(FFDC_TRACE_GPE0_SIZE, 0x200)
HCD_CONST(FFDC_TRACE_GPE1_SIZE, 0x200)
HCD_CONST(FFDC_SHARED_SRAM_SIZE, 0x200)
HCD_CONST(FFDC_OCC_REGS_SIZE, 0x580)
HCD_CONST(FFDC_OCC_REGION_SIZE, (FFDC_OCC_REGION_HDR_SIZE +
FFDC_TRACE_ERR_SIZE +
FFDC_TRACE_IMP_SIZE +
FFDC_TRACE_INF_SIZE +
FFDC_TRACE_SSX_SIZE +
FFDC_TRACE_GPE0_SIZE +
FFDC_TRACE_GPE1_SIZE +
FFDC_SHARED_SRAM_SIZE +
FFDC_OCC_REGS_SIZE))
HCD_CONST(FFDC_REGION_QPMR_BASE_OFFSET, 0xE0000)
HCD_CONST(FFDC_REGION_HOMER_BASE_OFFSET,
(QPMR_HOMER_OFFSET + FFDC_REGION_QPMR_BASE_OFFSET))
Expand Down
21 changes: 21 additions & 0 deletions src/import/chips/p9/procedures/hwp/lib/p9_hcd_memmap_occ_sram.H
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Original file line number Diff line number Diff line change
Expand Up @@ -48,6 +48,27 @@
/// OCC SRAM

HCD_CONST(OCC_SRAM_BASE_ADDR, 0xFFF00000)
HCD_CONST(GPE0_SRAM_BASE_ADDR, 0xFFF01000)
HCD_CONST(GPE1_SRAM_BASE_ADDR, 0xFFF10000)

/// Base Addresses for various traces regions in OCC SRAM
HCD_CONST(OCC_SRAM_TRACE_BUF_BASE_SSX_PTR, 0xFFF40824)
HCD_CONST(OCC_SRAM_TRACE_BUF_BASE_ERR, 0xFFFB4000)
HCD_CONST(OCC_SRAM_TRACE_BUF_BASE_INF, 0xFFFB6000)
HCD_CONST(OCC_SRAM_TRACE_BUF_BASE_IMP, 0xFFFB8000)
// @TODO: HCD_CONST(OCC_SRAM_TRACE_BUF_BASE_SHARED, 0x0)
HCD_CONST(GPE0_SRAM_TRACE_BUF_PTR, GPE0_SRAM_BASE_ADDR + 0x184)
HCD_CONST(GPE1_SRAM_TRACE_BUF_PTR, GPE1_SRAM_BASE_ADDR + 0x184)

// Size of various traces regions in OCC SRAM
HCD_CONST(OCC_SRAM_TRACE_BUF_SSX_SIZE_PTR, 0xFFF40828)
HCD_CONST(OCC_SRAM_TRACE_BUF_ERR_SIZE, (8 * ONE_KB))
HCD_CONST(OCC_SRAM_TRACE_BUF_INF_SIZE, (8 * ONE_KB))
HCD_CONST(OCC_SRAM_TRACE_BUF_IMP_SIZE, (8 * ONE_KB))
// @TODO: HCD_CONST(OCC_SRAM_TRACE_BUF_SHARED_SIZE, )
HCD_CONST(GPE0_SRAM_TRACE_BUF_SIZE_PTR, (GPE0_SRAM_BASE_ADDR + 0x188))
HCD_CONST(GPE1_SRAM_TRACE_BUF_SIZE_PTR, (GPE1_SRAM_BASE_ADDR + 0x188))

HCD_CONST(OCC_SRAM_IPC_REGION_SIZE, (4 * ONE_KB))
HCD_CONST(OCC_SRAM_GPE0_REGION_SIZE, (60 * ONE_KB))
HCD_CONST(OCC_SRAM_GPE1_REGION_SIZE, (64 * ONE_KB))
Expand Down
104 changes: 102 additions & 2 deletions src/import/chips/p9/procedures/hwp/pm/p9_pm_recovery_ffdc_base.C
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Original file line number Diff line number Diff line change
Expand Up @@ -26,6 +26,7 @@

#include <p9_pm_recovery_ffdc_base.H>
#include <p9_pm_recovery_ffdc_defines.H>
#include <p9_ppe_state.H>
#include <endian.h>
#include <stddef.h>

Expand All @@ -45,7 +46,7 @@

fapi2::ReturnCode PlatPmComplex::collectFfdc( void * i_pHomerBuf )
{
FAPI_DBG("<< PlatPmComplex::collectFfdc");
FAPI_DBG(">> PlatPmComplex::collectFfdc");

FAPI_DBG("<< PlatPmComplex::collectFfdc");
return fapi2::FAPI2_RC_SUCCESS;;
Expand Down Expand Up @@ -107,8 +108,107 @@
return fapi2::FAPI2_RC_SUCCESS;
}

//---------------------------------------------------------------------------------------------
//------------------------------------------------------------------------------
// @TODO May need to port this away, based on discussion
fapi2::ReturnCode PlatPmComplex::readPpeHaltState (
const uint64_t i_xirBaseAddress,
uint8_t& o_ppeHaltState )
{
FAPI_DBG ( ">> PlatPmComplex::getPpeHaltState XIR Base: 0x%08llX",
i_xirBaseAddress );

fapi2::ReturnCode l_rc;
fapi2::buffer<uint64_t> l_data64;

o_ppeHaltState = PPE_HALT_COND_UNKNOWN;

// Read the PPE XIR pair for XSR+SPRG0
l_rc = getScom ( iv_procChip,
(i_xirBaseAddress + PPE_XIRAMDBG),
l_data64 );

if ( l_rc == fapi2::FAPI2_RC_SUCCESS )
{ // PU_PPE_XIRAMDBG_XSR_HS
if ( l_data64.getBit (0, 1) )
{ // Halt exists, get all bits 0:3
l_data64.getBit (PU_PPE_XIRAMDBG_XSR_HS, 4);
o_ppeHaltState = static_cast<uint8_t> (l_data64());
}
else
{ // PPE is not halted
o_ppeHaltState = PPE_HALT_COND_NONE;
}
}
else
{
FAPI_ERR ("::readPpeHaltState: Error reading PPE XIRAMDBG");
}

FAPI_DBG ( "<< PlatPmComplex::getPpeHaltState: 0x%02X",
o_ppeHaltState );
return fapi2::FAPI2_RC_SUCCESS;
}

//------------------------------------------------------------------------------
// @TODO Ideally, the reset flow should have already halted the PPE.
// Should the default mode here be FORCE_HALT? Is that safe?
fapi2::ReturnCode PlatPmComplex::collectPpeState (
const uint64_t i_xirBaseAddress,
const uint8_t* i_pHomerOffset,
const PPE_DUMP_MODE i_mode )
{
FAPI_DBG (">> PlatPmComplex:collectPpeState");
PpeFfdcLayout* l_pPpeFfdc = (PpeFfdcLayout*) (i_pHomerOffset);
PPERegValue_t* l_pPpeRegVal = NULL;

std::vector<PPERegValue_t> l_vSprs;
std::vector<PPERegValue_t> l_vGprs;
std::vector<PPERegValue_t> l_vXirs;

// @TODO Update the ppe_halt HWP to avoid halting the PPE again
// if it is already halted. Can potentially change the XSR?
FAPI_TRY ( p9_ppe_state (
iv_procChip,
i_xirBaseAddress,
i_mode,
l_vSprs,
l_vXirs,
l_vGprs) );

// @TODO any faster way, e.g. use data() method and memcpy?
l_pPpeRegVal = (PPERegValue_t*) &l_pPpeFfdc->iv_ppeXirReg[0];
for ( auto& it : l_vXirs )
{
l_pPpeRegVal->number = it.number;
l_pPpeRegVal->value = it.value;
++l_pPpeRegVal;
}

l_pPpeRegVal = (PPERegValue_t*) &l_pPpeFfdc->iv_ppeSpr[0];
for ( auto& it : l_vSprs )
{
l_pPpeRegVal->number = it.number;
l_pPpeRegVal->value = it.value;
++l_pPpeRegVal;
}

l_pPpeRegVal = (PPERegValue_t*) &l_pPpeFfdc->iv_ppeGprs[0];
for ( auto& it : l_vGprs )
{
l_pPpeRegVal->number = it.number;
l_pPpeRegVal->value = it.value;
++l_pPpeRegVal;
}

fapi_try_exit:
FAPI_DBG ( "<< PlatPmComplex::collectPpeState XIRs:%d SPRs:%d GPRs:%d",
l_vXirs.size(), l_vSprs.size(), l_vGprs.size() );

return fapi2::current_err;
}


//---------------------------------------------------------------------------------------------
fapi2::ReturnCode PlatPmComplex::collectSramInfo( const fapi2::Target< fapi2::TARGET_TYPE_EX > & i_exTgt,
uint8_t * i_pSramData,
FfdcDataType i_dataType,
Expand Down
26 changes: 24 additions & 2 deletions src/import/chips/p9/procedures/hwp/pm/p9_pm_recovery_ffdc_base.H
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Original file line number Diff line number Diff line change
Expand Up @@ -48,6 +48,7 @@
#include <p9_pm_ocb_indir_access.H>
#include <p9_cme_sram_access.H>
#include <p9_pm_ocb_indir_setup_linear.H>
#include <p9_ppe_utils.H>

namespace p9_stop_recov_ffdc
{
Expand All @@ -73,19 +74,40 @@ namespace p9_stop_recov_ffdc
// @return fapi2 return code.
virtual fapi2::ReturnCode collectFfdc( void* i_pHomerBuf );

/// @brief sets start address of platform's trace buffer.
void setTraceBufAddr (uint32_t i_addr)
{ iv_traceBufBaseAddress = i_addr; }

///@brief returns instance id.
PmComplexPlatId getPlatId() { return iv_plat ; }

/// @brief returns proc chip target associated with platform
fapi2::Target< fapi2::TARGET_TYPE_PROC_CHIP > getProcChip() const { return iv_procChip; }

protected:
protected:
///@brief reads the PPE Halt State from XSR, w/o halting the PPE
///@param[in] i_xirBaseAddress XCR SCOM Address of the PPE
///@param[out] o_haltCondition p9_stop_recov_ffdc::PpeHaltCondition
///@return fapi2 return code
fapi2::ReturnCode readPpeHaltState (
const uint64_t i_xirBaseAddress,
uint8_t& o_haltCondition );

///@brief collects PPE State (XIRs, SPRs, GPRs) to a loc in HOMER
///@param[in] i_xirBaseAddress XCR SCOM Address of the PPE
///@param[in] i_pHomerOffset PPE section base address in HOMER
///@param[in] i_mode PPE_DUMP_MODE, defaults to HALT
///@return fapi2 return code
fapi2::ReturnCode collectPpeState (
const uint64_t i_xirBaseAddress,
const uint8_t* i_pHomerOffset,
const PPE_DUMP_MODE i_mode = HALT );

///@brief collects FFDC from CME/OCC SRAM
///@param[in] i_chipletTarget fapi2 target for EX or Proc
///@param[in] i_pSramData points to HOMER location containing SRAM contents
///@param[in] i_dataType type of FFDC data
///@param[in] i_sramLength length of SRAM FFDC
///@param[in] i_sramLength length of SRAM FFDC in bytes
///@return fapi2 return code
fapi2::ReturnCode collectSramInfo( const fapi2::Target< fapi2::TARGET_TYPE_EX >& i_exTgt,
uint8_t * i_pSramData,
Expand Down
1 change: 1 addition & 0 deletions src/import/chips/p9/procedures/hwp/pm/p9_pm_recovery_ffdc_base.mk
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Original file line number Diff line number Diff line change
Expand Up @@ -26,5 +26,6 @@ PROCEDURE = p9_pm_recovery_ffdc_base
FFDC_INC=$(ROOTPATH)/chips/p9/procedures/hwp/lib/
lib$(PROCEDURE)_DEPLIBS+=p9_pm_ocb_indir_setup_linear
lib$(PROCEDURE)_DEPLIBS+=p9_cme_sram_access
lib$(PROCEDURE)_DEPLIBS+=p9_ppe_state
$(call ADD_MODULE_INCDIR,$(FFDC_INC))
$(call BUILD_PROCEDURE)
27 changes: 18 additions & 9 deletions src/import/chips/p9/procedures/hwp/pm/p9_pm_recovery_ffdc_cme.C
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Original file line number Diff line number Diff line change
Expand Up @@ -42,6 +42,7 @@

#include <p9_pm_recovery_ffdc_cme.H>
#include <p9_hcd_memmap_cme_sram.H>
#include <p9_ppe_defs.H>
#include <stddef.h>
#include <endian.h>

Expand All @@ -67,7 +68,7 @@
uint8_t l_exPos = 0;
uint8_t l_cmePos = 0;
uint8_t l_ffdcValdityVect = PPE_FFDC_ALL_VALID;
uint8_t l_haltState = 0; //FIXME Needs update when PPE State gets handled
uint8_t l_haltState = PPE_HALT_COND_UNKNOWN;
uint8_t *l_pFfdcLoc = NULL;
HomerFfdcRegion * l_pHomerFfdc =
( HomerFfdcRegion *)( (uint8_t *)i_pHomerBuf + FFDC_REGION_HOMER_BASE_OFFSET );
Expand Down Expand Up @@ -95,6 +96,22 @@

//In case of error , invalidate FFDC in header.

// @TODO this is still after reset, which would have already
// halted the ppe. We need a wa to record this before reset
// and pass it down, or have a spl r-m-w update per member
// of the PPE Header?
// l_retCode = getPpeHaltState (
// getCmeBaseAddress (l_cmePos),
// l_haltState);

l_retCode = collectPpeState ( getCmeBaseAddress (l_cmePos),
l_pFfdcLoc );
if ( l_retCode != fapi2::FAPI2_RC_SUCCESS )
{
FAPI_ERR ( "Error collecting CME State, CME Pos 0x08x",
l_cmePos );
l_ffdcValdityVect &= ~PPE_STATE_VALID;
}
l_retCode = collectTrace( l_pFfdcLoc, ex );

if( l_retCode )
Expand Down Expand Up @@ -173,14 +190,6 @@

//-----------------------------------------------------------------------

fapi2::ReturnCode PlatCme::collectCmeState( uint8_t * i_pCmeState,
const fapi2::Target<fapi2::TARGET_TYPE_EX >& i_exTgt )
{
return fapi2::FAPI2_RC_SUCCESS;
}

//-----------------------------------------------------------------------

fapi2::ReturnCode PlatCme::collectInternalReg( uint8_t * i_pCmeIntReg,
const fapi2::Target<fapi2::TARGET_TYPE_EX >& i_exTgt )
{
Expand Down
6 changes: 0 additions & 6 deletions src/import/chips/p9/procedures/hwp/pm/p9_pm_recovery_ffdc_cme.H
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Original file line number Diff line number Diff line change
Expand Up @@ -73,12 +73,6 @@ namespace p9_stop_recov_ffdc
fapi2::ReturnCode collectGlobals( uint8_t * i_pHomerBuf,
const fapi2::Target< fapi2::TARGET_TYPE_EX > & i_exTgt );

/// @brief collects CME state for a given CME.
/// @param[in] i_pHomerBuf points to location of HOMER meant for CME's state.
/// @param[in] i_exTgt fapi2 target for ex
fapi2::ReturnCode collectCmeState( uint8_t * i_pHomerBuf ,
const fapi2::Target< fapi2::TARGET_TYPE_EX > & i_exTgt);

/// @brief collects internal register info for a given CME
/// @param[in] i_pHomerBuf points to location of HOMER meant for CME's internal register.
/// @param[in] i_exTgt fapi2 target for ex
Expand Down

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