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enable commandlists on non-gemini systems
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Change-Id: Icbef43252bb5705af08b9b8600038f6ae739a1a0
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/91656
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: Mark Pizzutillo <mark.pizzutillo@ibm.com>
Reviewed-by: SHELTON LEUNG <sleung@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Jennifer A Stofer <stofer@us.ibm.com>
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/91662
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M Crowell <dcrowell@us.ibm.com>
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@adamant1 @dcrowell77
adamant1 authored and dcrowell77 committed Feb 20, 2020
1 parent 3655c17 commit 7460967
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Showing 2 changed files with 16 additions and 9 deletions.
6 changes: 1 addition & 5 deletions src/import/chips/p9/procedures/hwp/initfiles/p9a_mi_scom.C
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Original file line number Diff line number Diff line change
Expand Up @@ -5,7 +5,7 @@
/* */
/* OpenPOWER HostBoot Project */
/* */
/* Contributors Listed Below - COPYRIGHT 2018,2019 */
/* Contributors Listed Below - COPYRIGHT 2018,2020 */
/* [+] International Business Machines Corp. */
/* */
/* */
Expand All @@ -32,8 +32,6 @@ using namespace fapi2;
constexpr uint64_t literal_7 = 7;
constexpr uint64_t literal_1 = 1;
constexpr uint64_t literal_0x19 = 0x19;
constexpr uint64_t literal_0b1111000000 = 0b1111000000;
constexpr uint64_t literal_0b0111111 = 0b0111111;
constexpr uint64_t literal_0b0000000000001000 = 0b0000000000001000;
constexpr uint64_t literal_0b011 = 0b011;
constexpr uint64_t literal_0b01 = 0b01;
Expand Down Expand Up @@ -95,8 +93,6 @@ fapi2::ReturnCode p9a_mi_scom(const fapi2::Target<fapi2::TARGET_TYPE_MI>& TGT0,
l_scom_buffer.insert<4, 1, 63, uint64_t>(l_MC01_PBI01_SCOMFIR_MCMODE0_ENABLE_ECRESP_ON );
}

l_scom_buffer.insert<15, 10, 54, uint64_t>(literal_0b1111000000 );
l_scom_buffer.insert<25, 7, 57, uint64_t>(literal_0b0111111 );
constexpr auto l_MC01_PBI01_SCOMFIR_MCMODE0_FORCE_COMMANDLIST_VALID_ON = 0x1;
l_scom_buffer.insert<5, 1, 63, uint64_t>(l_MC01_PBI01_SCOMFIR_MCMODE0_FORCE_COMMANDLIST_VALID_ON );

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19 changes: 15 additions & 4 deletions src/import/chips/p9/procedures/hwp/nest/p9_mss_setup_bars.C
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Original file line number Diff line number Diff line change
Expand Up @@ -5,7 +5,7 @@
/* */
/* OpenPOWER HostBoot Project */
/* */
/* Contributors Listed Below - COPYRIGHT 2015,2019 */
/* Contributors Listed Below - COPYRIGHT 2015,2020 */
/* [+] Inspur Power Systems Corp. */
/* [+] International Business Machines Corp. */
/* */
Expand Down Expand Up @@ -61,7 +61,8 @@
const uint8_t USTL_MDI_EQUAL_ONE = 1;
const uint8_t MAX_MC_PORTS_PER_MCS = 2; // 2 MC ports per MCS
const uint8_t NO_CHANNEL_PER_GROUP = 0xFF; // Init value of channel per group

const uint32_t GEMINI_GLOBAL_CL_DISABLE = 0x3C0; //Gemini can't handle too many operations at once
const uint8_t GEMINI_FINE_CL_DISABLE = 0x3F ;
///----------------------------------------------------------------------------
/// Data structure definitions
///----------------------------------------------------------------------------
Expand Down Expand Up @@ -2412,10 +2413,20 @@ fapi2::ReturnCode applyGeminiFixes(const fapi2::Target<fapi2::TARGET_TYPE_MCC> i
fapi2::Target<fapi2::TARGET_TYPE_MI> l_mi_target = i_target.getParent<fapi2::TARGET_TYPE_MI>();
// Channel Timeout
FAPI_TRY(fapi2::getScom(l_mi_target, P9A_MI_MCTO, l_scom_data),
"Error reading from MCC_USTLCFG reg");
"Error reading from MI_MCTO reg");
l_scom_data.clearBit<P9A_MI_MCTO_ENABLE_CHANNEL_HANG>();
FAPI_TRY(fapi2::putScom(l_mi_target, P9A_MI_MCTO, l_scom_data),
"Error writing to MCC_USTLCFG reg");
"Error writing to MI_MCTO reg");

//Disable Commandlists
FAPI_TRY(fapi2::getScom(l_mi_target, P9A_MI_MCMODE0, l_scom_data),
"Error reading from MI_MCMODE0 reg");
l_scom_data.insertFromRight<P9A_MI_MCMODE0_CL_GLOBAL_DISABLE,
P9A_MI_MCMODE0_CL_GLOBAL_DISABLE_LEN>(GEMINI_GLOBAL_CL_DISABLE);
l_scom_data.insertFromRight<P9A_MI_MCMODE0_CL_FINE_DISABLE,
P9A_MI_MCMODE0_CL_FINE_DISABLE_LEN>(GEMINI_FINE_CL_DISABLE);
FAPI_TRY(fapi2::putScom(l_mi_target, P9A_MI_MCMODE0, l_scom_data),
"Error writing to MI_MCMODE0 reg");
}

return fapi2::FAPI2_RC_SUCCESS;
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