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HW508063: Fix Mirrored BAR setup for SMF and Holes,set map_mode when …
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…flipped

Change-Id: I58a721d5371d5d5a10094ab46e15f9ab4083227d
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/84996
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Thi N Tran <thi@us.ibm.com>
Reviewed-by: Benjamin Gass <bgass@us.ibm.com>
Reviewed-by: Adam S Hale <adam.samuel.hale@ibm.com>
Reviewed-by: Jennifer A Stofer <stofer@us.ibm.com>
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/85185
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Christian R Geddes <crgeddes@us.ibm.com>
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@adamant1 @crgeddes
adamant1 authored and crgeddes committed Oct 28, 2019
1 parent d639a5a commit 8b1553d
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Showing 2 changed files with 184 additions and 110 deletions.
14 changes: 14 additions & 0 deletions src/import/chips/p9/procedures/hwp/initfiles/p9a_mi_scom.C
View file
Original file line number Diff line number Diff line change
Expand Up @@ -45,6 +45,8 @@ fapi2::ReturnCode p9a_mi_scom(const fapi2::Target<fapi2::TARGET_TYPE_MI>& TGT0,
uint64_t l_def_ENABLE_PREFETCH_DROP_PROMOTE_BASIC = literal_1;
fapi2::ATTR_ENABLE_MEM_EARLY_DATA_SCOM_Type l_TGT1_ATTR_ENABLE_MEM_EARLY_DATA_SCOM;
FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_ENABLE_MEM_EARLY_DATA_SCOM, TGT1, l_TGT1_ATTR_ENABLE_MEM_EARLY_DATA_SCOM));
fapi2::ATTR_MEM_MIRROR_PLACEMENT_POLICY_Type l_TGT1_ATTR_MEM_MIRROR_PLACEMENT_POLICY;
FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_MEM_MIRROR_PLACEMENT_POLICY, TGT1, l_TGT1_ATTR_MEM_MIRROR_PLACEMENT_POLICY));
uint64_t l_def_ENABLE_AMO_CACHING = literal_1;
uint64_t l_def_ENABLE_MCU_TIMEOUTS = literal_1;
fapi2::buffer<uint64_t> l_scom_buffer;
Expand Down Expand Up @@ -97,6 +99,18 @@ fapi2::ReturnCode p9a_mi_scom(const fapi2::Target<fapi2::TARGET_TYPE_MI>& TGT0,
l_scom_buffer.insert<25, 7, 57, uint64_t>(literal_0b0111111 );
constexpr auto l_MC01_PBI01_SCOMFIR_MCMODE0_FORCE_COMMANDLIST_VALID_ON = 0x1;
l_scom_buffer.insert<5, 1, 63, uint64_t>(l_MC01_PBI01_SCOMFIR_MCMODE0_FORCE_COMMANDLIST_VALID_ON );

if ((l_TGT1_ATTR_MEM_MIRROR_PLACEMENT_POLICY == fapi2::ENUM_ATTR_MEM_MIRROR_PLACEMENT_POLICY_FLIPPED))
{
constexpr auto l_MC01_PBI01_SCOMFIR_MCMODE0_MEM_MAP_MODE_ON = 0x1;
l_scom_buffer.insert<36, 1, 63, uint64_t>(l_MC01_PBI01_SCOMFIR_MCMODE0_MEM_MAP_MODE_ON );
}
else if ((l_TGT1_ATTR_MEM_MIRROR_PLACEMENT_POLICY == fapi2::ENUM_ATTR_MEM_MIRROR_PLACEMENT_POLICY_NORMAL))
{
constexpr auto l_MC01_PBI01_SCOMFIR_MCMODE0_MEM_MAP_MODE_OFF = 0x0;
l_scom_buffer.insert<36, 1, 63, uint64_t>(l_MC01_PBI01_SCOMFIR_MCMODE0_MEM_MAP_MODE_OFF );
}

FAPI_TRY(fapi2::putScom(TGT0, 0x5010811ull, l_scom_buffer));
}
{
Expand Down
280 changes: 170 additions & 110 deletions src/import/chips/p9/procedures/hwp/nest/p9_mss_setup_bars.C
View file
Original file line number Diff line number Diff line change
Expand Up @@ -2045,10 +2045,19 @@ fapi2::ReturnCode writeMCBarData(
uint8_t l_pos;

fapi2::buffer<uint64_t> l_scomData(0);
fapi2::buffer<uint64_t> l_scomData_mirror(0);
fapi2::buffer<uint64_t> l_scomData_mcmode(0);
fapi2::buffer<uint64_t> l_extAddr(0);
fapi2::buffer<uint64_t> l_norAddr;
uint64_t l_ext_mask;

const fapi2::Target<fapi2::TARGET_TYPE_SYSTEM> FAPI_SYSTEM;
uint8_t mirror_policy;

FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_MEM_MIRROR_PLACEMENT_POLICY, FAPI_SYSTEM, mirror_policy),
"Error reading ATTR_MEM_MIRROR_PLACEMENT_POLICY, l_rc 0x%.8X",
(uint64_t)fapi2::current_err);

FAPI_TRY(p9a_get_ext_mask(l_ext_mask));

FAPI_TRY(writeMCCInterleaveGranularity(i_mcBarDataPair));
Expand Down Expand Up @@ -2154,65 +2163,176 @@ fapi2::ReturnCode writeMCBarData(
"Error writing to P9A_MI_MCFGPM1 reg");
}

// 3. ---- Set MCFGPA reg -----
// 3. ---- Set MCFGPA/MCFGPMA regs -----
l_scomData = 0;

// Assert if both HOLE1 and SMF are valid, settings will overlap
FAPI_ASSERT((l_data.MCFGPA_HOLE_valid[1] && l_data.MCFGPA_SMF_valid) == 0,
fapi2::MSS_SETUP_BARS_HOLE1_SMF_CONFLICT()
.set_TARGET(l_target)
.set_HOLE1_VALID(l_data.MCFGPA_HOLE_valid[1])
.set_SMF_VALID(l_data.MCFGPA_SMF_valid),
"Error: MCFGPA HOLE1 and SMF are both valid, settings will overlap");
l_scomData_mirror = 0;

// Hole 0
if (l_data.MCFGPA_HOLE_valid[0] == true)
{
// MCFGPA HOLE0 valid (bit 0)
l_scomData.setBit<P9A_MI_MCFGP0A_HOLE_VALID>();
if(mirror_policy ==
fapi2::ENUM_ATTR_MEM_MIRROR_PLACEMENT_POLICY_NORMAL) //Non-mirrored mode, but still set up mirrored equiv addressses
{
// Non-mirrored
// MCFGP0A HOLE valid (bit 0)
l_scomData.setBit<P9A_MI_MCFGP0A_HOLE_VALID>();

// Hole lower addr
// Hole always extends to end of range
FAPI_DBG("l_data.MCFGPA_HOLE_LOWER_addr[0]: %016llx", l_data.MCFGPA_HOLE_LOWER_addr[0]);
FAPI_TRY(extBar(l_ext_mask, l_data.MCFGPA_HOLE_LOWER_addr[0], l_extAddr));
l_scomData.insert<P9A_MI_MCFGP0A_HOLE_LOWER_ADDRESS,
P9A_MI_MCFGP0A_HOLE_LOWER_ADDRESS_LEN>(
(l_extAddr << 9)); //matches 17:31 extendedBarAddress shifts left 8 (17-8) = 9

// Mirrored Address = Non-mirrored >> 1 since bit 56 is not part of the dsaddr
// MCFGPM0A HOLE0 valid (bit 0)
l_scomData_mirror.setBit<P9A_MI_MCFGPM0A_HOLE_VALID>();

// Hole lower addr
// Hole always extends to end of range
FAPI_DBG("l_data.MCFGPA_HOLE_LOWER_addr[0]: %016llx", (l_data.MCFGPA_HOLE_LOWER_addr[0] >> 1));
FAPI_TRY(extBar(l_ext_mask, l_data.MCFGPA_HOLE_LOWER_addr[0], l_extAddr));
l_scomData_mirror.insert<P9A_MI_MCFGPM0A_HOLE_LOWER_ADDRESS,
P9A_MI_MCFGPM0A_HOLE_LOWER_ADDRESS_LEN>(
(l_extAddr << 8)); //matches 17:31 extendedBarAddress shifts left 8 (17- (8 + 1)) = 8
}
else
{
// Mirrored Address
// MCFGPM0A HOLE0 valid (bit 0)
l_scomData_mirror.setBit<P9A_MI_MCFGPM0A_HOLE_VALID>();

// Hole 0 lower addr
// Hole 0 always extends to end of range
FAPI_DBG("l_data.MCFGPA_HOLE_LOWER_addr[0]: %016llx", l_data.MCFGPA_HOLE_LOWER_addr[0]);
FAPI_TRY(extBar(l_ext_mask, l_data.MCFGPA_HOLE_LOWER_addr[0], l_extAddr));
l_scomData_mirror.insert<P9A_MI_MCFGPM0A_HOLE_LOWER_ADDRESS,
P9A_MI_MCFGPM0A_HOLE_LOWER_ADDRESS_LEN>(
(l_extAddr << 9)); //matches 17:31 extendedBarAddress shifts left 8 (17- 8) = 9

// Non-mirrored Address = Mirrored Address << 1 since bit 56 is part of the dsaddr
// MCFGPA HOLE0 valid (bit 0)
l_scomData.setBit<P9A_MI_MCFGP0A_HOLE_VALID>();

// Hole 0 lower addr
// Hole 0 always extends to end of range
FAPI_DBG("l_data.MCFGPA_HOLE_LOWER_addr[0]: %016llx", (l_data.MCFGPA_HOLE_LOWER_addr[0] << 1));
FAPI_TRY(extBar(l_ext_mask, l_data.MCFGPA_HOLE_LOWER_addr[0], l_extAddr));
l_scomData.insert<P9A_MI_MCFGP0A_HOLE_LOWER_ADDRESS,
P9A_MI_MCFGP0A_HOLE_LOWER_ADDRESS_LEN>(
(l_extAddr << 10)); //matches 17:31 extendedBarAddress shifts left 8 (17- (8 - 1)) = 10

// Hole 0 lower addr
// Hole 0 always extends to end of range
FAPI_DBG("l_data.MCFGPA_HOLE_LOWER_addr[0]: %016llx", l_data.MCFGPA_HOLE_LOWER_addr[0]);
FAPI_TRY(extBar(l_ext_mask, l_data.MCFGPA_HOLE_LOWER_addr[0], l_extAddr));
l_scomData.insert<P9A_MI_MCFGP0A_HOLE_LOWER_ADDRESS,
P9A_MI_MCFGP0A_HOLE_LOWER_ADDRESS_LEN>(
(l_extAddr << 9)); //matches 17:31 extendedBarAddress shifts left 8 (17-8) = 9
}
}

// SMF
if (l_data.MCFGPA_SMF_valid == true)
{
FAPI_DBG("Writing SMF bit into address extension now");
// Set up Extension Address for SMF
FAPI_TRY(fapi2::getScom(l_target.getParent<fapi2::TARGET_TYPE_MI>(), P9A_MI_MCMODE2, l_scomData),
FAPI_TRY(fapi2::getScom(l_target.getParent<fapi2::TARGET_TYPE_MI>(), P9A_MI_MCMODE2, l_scomData_mcmode),
"Error reading to P9A_MI_MCMODE2 reg");
l_scomData.setBit<46>();
FAPI_TRY(fapi2::putScom(l_target.getParent<fapi2::TARGET_TYPE_MI>(), P9A_MI_MCMODE2, l_scomData),
l_scomData_mcmode.setBit<P9A_MI_MCMODE2_CHIP_ADDRESS_EXTENSION_MASK_ENABLE>();
FAPI_TRY(fapi2::putScom(l_target.getParent<fapi2::TARGET_TYPE_MI>(), P9A_MI_MCMODE2, l_scomData_mcmode),
"Error writing to P9A_MI_MCMODE2 reg");

l_scomData = 0;
// MCFGPA SMF valid (bit 0)
l_scomData.setBit<P9A_MI_MCFGP0A_SMF_VALID>();

// MCFGPA_SMF_UPPER_ADDRESS_AT_END_OF_RANGE
l_scomData.setBit<P9A_MI_MCFGP0A_SMF_EXTEND_TO_END_OF_RANGE>();
if(mirror_policy ==
fapi2::ENUM_ATTR_MEM_MIRROR_PLACEMENT_POLICY_NORMAL) //Non-mirrored mode, but still set up mirrored equiv addressses
{
//Non-mirrored
// MCFGPA SMF valid (bit 0)
l_scomData.setBit<P9A_MI_MCFGP0A_SMF_VALID>();

// MCFGPA_SMF_UPPER_ADDRESS_AT_END_OF_RANGE
l_scomData.setBit<P9A_MI_MCFGP0A_SMF_EXTEND_TO_END_OF_RANGE>();

// SMF lower addr
l_norAddr = 0;
l_norAddr.insertFromRight<17, 19>(l_data.MCFGPA_SMF_LOWER_addr);
FAPI_TRY(extendBarAddress(l_ext_mask, l_norAddr, l_extAddr));
l_scomData.insert<P9A_MI_MCFGP0A_SMF_LOWER_ADDRESS,
P9A_MI_MCFGP0A_SMF_LOWER_ADDRESS_LEN>(
(l_extAddr << 9)); //matches 17:35 extendBarAddress shifts left 8 (17-8) = 9
// SMF upper addr
l_norAddr = 0;
l_norAddr.insertFromRight<17, 19>(l_data.MCFGPA_SMF_UPPER_addr);
FAPI_TRY(extendBarAddress(l_ext_mask, l_norAddr, l_extAddr));
l_scomData.insert<P9A_MI_MCFGP0A_SMF_UPPER_ADDRESS,
P9A_MI_MCFGP0A_SMF_UPPER_ADDRESS_LEN>(
(l_extAddr << 9)); //matches 17:35 extendBarAddress shifts left 8 (17-8) = 9


//Mirrored BAR = Non-mirrored BAR >> 1 since bit 56 is not a dsaddr bit
// MCFGPA SMF valid (bit 0)
l_scomData_mirror.setBit<P9A_MI_MCFGPM0A_SMF_VALID>();

// MCFGPA_SMF_UPPER_ADDRESS_AT_END_OF_RANGE
l_scomData_mirror.setBit<P9A_MI_MCFGPM0A_SMF_EXTEND_TO_END_OF_RANGE>();

// SMF lower addr
l_norAddr = 0;
l_norAddr.insertFromRight<17, 19>(l_data.MCFGPA_SMF_LOWER_addr);
FAPI_TRY(extendBarAddress(l_ext_mask, l_norAddr, l_extAddr));
l_scomData_mirror.insert<P9A_MI_MCFGPM0A_SMF_LOWER_ADDRESS,
P9A_MI_MCFGPM0A_SMF_LOWER_ADDRESS_LEN>(
(l_extAddr << 8)); //matches 17:35 extendBarAddress shifts left 8 (17- (8 + 1)) = 8
// SMF upper addr
l_norAddr = 0;
l_norAddr.insertFromRight<17, 19>(l_data.MCFGPA_SMF_UPPER_addr);
FAPI_TRY(extendBarAddress(l_ext_mask, l_norAddr, l_extAddr));
l_scomData_mirror.insert<P9A_MI_MCFGPM0A_SMF_UPPER_ADDRESS,
P9A_MI_MCFGPM0A_SMF_UPPER_ADDRESS_LEN>(
(l_extAddr << 8)); //matches 17:35 extendBarAddress shifts left 8 (17- (8 + 1)) = 8
}
else
{
//Mirrored
// MCFGPA SMF valid (bit 0)
l_scomData_mirror.setBit<P9A_MI_MCFGPM0A_SMF_VALID>();

// MCFGPA_SMF_UPPER_ADDRESS_AT_END_OF_RANGE
l_scomData_mirror.setBit<P9A_MI_MCFGPM0A_SMF_EXTEND_TO_END_OF_RANGE>();

// SMF lower addr
l_norAddr = 0;
l_norAddr.insertFromRight<17, 19>(l_data.MCFGPA_SMF_LOWER_addr);
FAPI_TRY(extendBarAddress(l_ext_mask, l_norAddr, l_extAddr));
l_scomData_mirror.insert<P9A_MI_MCFGPM0A_SMF_LOWER_ADDRESS,
P9A_MI_MCFGPM0A_SMF_LOWER_ADDRESS_LEN>(
(l_extAddr << 9)); //matches 17:35 extendBarAddress shifts left 8 (17- 8) = 9
// SMF upper addr
l_norAddr = 0;
l_norAddr.insertFromRight<17, 19>(l_data.MCFGPA_SMF_UPPER_addr);
FAPI_TRY(extendBarAddress(l_ext_mask, l_norAddr, l_extAddr));
l_scomData_mirror.insert<P9A_MI_MCFGPM0A_SMF_UPPER_ADDRESS,
P9A_MI_MCFGPM0A_SMF_UPPER_ADDRESS_LEN>(
(l_extAddr << 9)); //matches 17:35 extendBarAddress shifts left 8 (17- 8) = 9

//Non-Mirrored BAR = Mirrored BAR << 1 since bit 56 is now a dsaddr bit
// MCFGPA SMF valid (bit 0)
l_scomData.setBit<P9A_MI_MCFGP0A_SMF_VALID>();

// MCFGPA_SMF_UPPER_ADDRESS_AT_END_OF_RANGE
l_scomData.setBit<P9A_MI_MCFGP0A_SMF_EXTEND_TO_END_OF_RANGE>();

// SMF lower addr
l_norAddr = 0;
l_norAddr.insertFromRight<17, 19>(l_data.MCFGPA_SMF_LOWER_addr);
FAPI_TRY(extendBarAddress(l_ext_mask, l_norAddr, l_extAddr));
l_scomData.insert<P9A_MI_MCFGP0A_SMF_LOWER_ADDRESS,
P9A_MI_MCFGP0A_SMF_LOWER_ADDRESS_LEN>(
(l_extAddr << 10)); //matches 17:35 extendBarAddress shifts left 8 (17- (8 - 1)) = 10
// SMF upper addr
l_norAddr = 0;
l_norAddr.insertFromRight<17, 19>(l_data.MCFGPA_SMF_UPPER_addr);
FAPI_TRY(extendBarAddress(l_ext_mask, l_norAddr, l_extAddr));
l_scomData.insert<P9A_MI_MCFGP0A_SMF_UPPER_ADDRESS,
P9A_MI_MCFGP0A_SMF_UPPER_ADDRESS_LEN>(
(l_extAddr << 10)); //matches 17:35 extendBarAddress shifts left 8 (17- (8 - 1)) = 10

// SMF lower addr
l_norAddr = 0;
l_norAddr.insertFromRight<17, 19>(l_data.MCFGPA_SMF_LOWER_addr);
FAPI_TRY(extendBarAddress(l_ext_mask, l_norAddr, l_extAddr));
l_scomData.insert<P9A_MI_MCFGP0A_SMF_LOWER_ADDRESS,
P9A_MI_MCFGP0A_SMF_LOWER_ADDRESS_LEN>(
(l_extAddr << 9)); //matches 17:35 extendBarAddress shifts left 8 (17-8) = 9
// SMF upper addr
l_norAddr = 0;
l_norAddr.insertFromRight<17, 19>(l_data.MCFGPA_SMF_UPPER_addr);
FAPI_TRY(extendBarAddress(l_ext_mask, l_norAddr, l_extAddr));
l_scomData.insert<P9A_MI_MCFGP0A_SMF_UPPER_ADDRESS,
P9A_MI_MCFGP0A_SMF_UPPER_ADDRESS_LEN>(
(l_extAddr << 9)); //matches 17:35 extendBarAddress shifts left 8 (17-8) = 9

}
}

// Write to reg
Expand All @@ -2222,83 +2342,24 @@ fapi2::ReturnCode writeMCBarData(
P9A_MI_MCFGP0A, l_scomData);
FAPI_TRY(fapi2::putScom(l_target.getParent<fapi2::TARGET_TYPE_MI>(), P9A_MI_MCFGP0A, l_scomData),
"Error writing to P9A_MI_MCFGP0A reg");

FAPI_INF("Write MCFGPM0A reg 0x%.16llX, Value 0x%.16llX",
P9A_MI_MCFGPM0A, l_scomData_mirror);
FAPI_TRY(fapi2::putScom(l_target.getParent<fapi2::TARGET_TYPE_MI>(), P9A_MI_MCFGPM0A, l_scomData_mirror),
"Error writing to P9A_MI_MCFGPM0A reg");
}
else
{
FAPI_INF("Write MCFGP1A reg 0x%.16llX, Value 0x%.16llX",
P9A_MI_MCFGP1A, l_scomData);
FAPI_TRY(fapi2::putScom(l_target.getParent<fapi2::TARGET_TYPE_MI>(), P9A_MI_MCFGP1A, l_scomData),
"Error writing to P9A_MI_MCFGP1A reg");
}

// 4. ---- Set MCFGPMA reg -----
l_scomData = 0;

// Assert if both HOLE1 and SMF are valid, settings will overlap
FAPI_ASSERT((l_data.MCFGPMA_HOLE_valid[1] && l_data.MCFGPMA_SMF_valid) == 0,
fapi2::MSS_SETUP_BARS_HOLE1_SMF_CONFLICT()
.set_TARGET(l_target)
.set_HOLE1_VALID(l_data.MCFGPMA_HOLE_valid[1])
.set_SMF_VALID(l_data.MCFGPMA_SMF_valid),
"Error: MCFGPMA HOLE1 and SMF are both valid, settings will overlap");

// Hole 0
if (l_data.MCFGPMA_HOLE_valid[0] == true)
{
// MCFGPMA HOLE0 valid (bit 0)
l_scomData.setBit<P9A_MI_MCFGPM0A_HOLE_VALID>();

// Hole 0 lower addr
// 0b0000000001 = 4GB
FAPI_TRY(extBar(l_ext_mask, l_data.MCFGPMA_HOLE_LOWER_addr[0], l_extAddr));
l_scomData.insert<P9A_MI_MCFGPM0A_HOLE_LOWER_ADDRESS,
P9A_MI_MCFGPM0A_HOLE_LOWER_ADDRESS_LEN>(
(l_extAddr << 9)); //matches 17:31 extendedBarAddress shifts left 8 (17-8) = 9
}

// SMF
if (l_data.MCFGPMA_SMF_valid == true)
{
// MCFGPMA SMF valid (bit 0)
l_scomData.setBit<P9A_MI_MCFGPM0A_SMF_VALID>();

// MCFGPMA_SMF_UPPER_ADDRESS_AT_END_OF_RANGE
l_scomData.setBit<P9A_MI_MCFGPM0A_SMF_EXTEND_TO_END_OF_RANGE>();

// SMF lower addr
l_norAddr = 0;
l_norAddr.insertFromRight<17, 19>(l_data.MCFGPMA_SMF_LOWER_addr);
FAPI_TRY(extendBarAddress(l_ext_mask, l_norAddr, l_extAddr));
l_scomData.insert<P9A_MI_MCFGPM0A_SMF_LOWER_ADDRESS,
P9A_MI_MCFGPM0A_SMF_LOWER_ADDRESS_LEN>(
(l_extAddr << 9 )); //matches 17:35 extendBarAddress shifts left 8 (17-8) = 9
// SMF upper addr
l_norAddr = 0;
l_norAddr.insertFromRight<17, 19>(l_data.MCFGPMA_SMF_UPPER_addr);
FAPI_TRY(extendBarAddress(l_ext_mask, l_norAddr, l_extAddr));
l_scomData.insert<P9A_MI_MCFGPM0A_SMF_UPPER_ADDRESS,
P9A_MI_MCFGPM0A_SMF_UPPER_ADDRESS_LEN>(
(l_extAddr << 9)); //matches 17:35 extendBarAddress shifts left 8 (17-8) = 9
}

// Write to reg
if (l_pos % 2 == 0)
{
FAPI_INF("Write P9A_MI_MCFGPM0A reg 0x%.16llX, Value 0x%.16llX",
P9A_MI_MCFGPM0A, l_scomData);

FAPI_TRY(fapi2::putScom(l_target.getParent<fapi2::TARGET_TYPE_MI>(), P9A_MI_MCFGPM0A, l_scomData),
"Error writing to P9A_MI_MCFGPM0A reg");
}
else
{
FAPI_INF("Write P9A_MI_MCFGPM1A reg 0x%.16llX, Value 0x%.16llX",
P9A_MI_MCFGPM1A, l_scomData);

FAPI_TRY(fapi2::putScom(l_target.getParent<fapi2::TARGET_TYPE_MI>(), P9A_MI_MCFGPM1A, l_scomData),
"Error writing to P9A_MI_MCFGPM1A reg");
FAPI_INF("Write MCFGPM1A reg 0x%.16llX, Value 0x%.16llX",
P9A_MI_MCFGPM1A, l_scomData_mirror);
FAPI_TRY(fapi2::putScom(l_target.getParent<fapi2::TARGET_TYPE_MI>(), P9A_MI_MCFGPM1A, l_scomData_mirror),
"Error writing to P9A_MI_MCFGP1A reg");
}

} // Data pair loop

fapi_try_exit:
Expand Down Expand Up @@ -2564,7 +2625,6 @@ fapi2::ReturnCode p9_mss_setup_bars(
uint64_t(fapi2::current_err));
}


// Write data to MI
FAPI_TRY(writeMCBarData(l_mccBarDataPair),
"writeMCBarData() returns error, l_rc 0x%.8X",
Expand Down

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