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Skip phase 2 of IDEC check for ocmb targets for gemini
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We did not figure out what register to read prior to bringup. This
commit will allow progress on the gemini swift machines until we
determine the correct register to read.

Change-Id: I7319e3fc204efe08c4cc38cf354df28cca87346b
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/81213
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Matt Derksen <mderkse1@us.ibm.com>
Reviewed-by: Roland Veloz <rveloz@us.ibm.com>
Reviewed-by: Daniel M Crowell <dcrowell@us.ibm.com>
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crgeddes authored and dcrowell77 committed Jul 30, 2019
1 parent b3c0acc commit f9d0c39
Showing 1 changed file with 6 additions and 2 deletions.
8 changes: 6 additions & 2 deletions src/usr/hwas/hwasPlat.C
Expand Up @@ -734,7 +734,9 @@ errlHndl_t ocmbIdecPhase2(const TARGETING::TargetHandle_t& i_target)
const uint16_t translatedId =
i_target->getAttr<TARGETING::ATTR_CHIP_ID>();

if (id != translatedId)
//@TODO RTC-209353: Read IDEC for Gemini.
if ( translatedId != POWER_CHIPID::GEMINI_16 &&
id != translatedId)
{
HWAS_ERR("ocmbIdecPhase2> OCMB Chip Id and associated SPD Chip Id "
"don't match: OCMB ID=0x%.4X; Translated SPD ID=0x%.4X;",
Expand Down Expand Up @@ -776,7 +778,9 @@ errlHndl_t ocmbIdecPhase2(const TARGETING::TargetHandle_t& i_target)

const uint8_t translatedEc = i_target->getAttr<TARGETING::ATTR_EC>();

if (ec != translatedEc)
//@TODO RTC-209353: Read IDEC for Gemini.
if (translatedId != POWER_CHIPID::GEMINI_16 &&
ec != translatedEc)
{
HWAS_ERR("ocmbIdecPhase2> OCMB Revision and associated SPD "
"Revision don't match: OCMB EC=0x%.2X; "
Expand Down

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