OE-27 "Wide Universal Intrinsics" discussion

[vpisarev]

the feature request about evolution proposal OE-27

[vpisarev]

@seiko2plus, I've added link to your #10708

[seiko2plus]

@vpisarev, #10708 going to mapping all universal intrinsics to avx2, I also made some changes to make it friendly with OE-27.

[pemmanuelviel]

@vpisarev I plan to port in OpenCV repo my assembly SSEx and intrinsic AVX-2 implementations of some distances for FLANN.
Are the wide universal instrinsics fully functional, in particular the ones for CV_SIMD256? Is there another doc than the one for "not wide" universal intrinsics? Thanks

[alalek]

@pemmanuelviel There is page about universal intrinsics in OpenCV Documentation.

[pemmanuelviel]

@alalek Thank you for the link. This is the doc for the "not-wide" universal intrinsics I was mentioning.
But as I didn't see details on the 256 avx registers I would like to know if there is any doc on "wide" universal intrinsics, as well as if they are fully functional.
I would prefer porting directly on 256 bits wide universal intrinsics equivalent of AVX-2, than the equivalents of SSEx intrinsics. Going from SSEx intrinsics to AVX-x intrinsics on Intel architectures is not only a mater of registers size. Actually as both SSE-x and AVX-x intrinsics are implemented in the way
C = A Op B,
the assembly instructions for SSE-x mostly work only with two registers and take the form
A = A Op B
Having a single SSE-x intrinsic instruction mapping a sequence of several assembly instructions might be the reason why the performance difference between SIMD assembly and intrinsic code is quite noticeable with SSE-x.

[terfendail]

Wide universal intrinsics are implemented for AVX2 and AVX512 architectures and are already used in core and impgproc modules.

Unfortunately there is no special documentation for wide universal intrinsics. However they were implemented in accordance with OE-27

Actually there are just a few changes to universal intrinsics idea:

• vector types don't contain length anymore (e.g. v_uint8 instead of v_uint8x16)
• intrinsics name should start with vx_ if it's impossible to deduce vector size from input values(e.g. vx_load instead of v_load, but v_fma retain the same name)
• address evaluation, loop steps etc MUST use type::nlanes( e.g. v_uint8::nlanes) instead of explicit vector length value

WUI always use the most wide vector size available for selected instruction set(i.e. if AVX512 support is enabled vector length for WUI will be 512-bit)