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Bug for fle/flt/feq ??? #52

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IC-Dream opened this issue Nov 21, 2018 · 2 comments
Closed

Bug for fle/flt/feq ??? #52

IC-Dream opened this issue Nov 21, 2018 · 2 comments
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@IC-Dream
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Hi,

From the riscv_spec_v2.2 Page 52:
fcmp

I created a directed case that set the operand to NAN like the below, but i didn't see that the NV flag was set in RTL.
ass

Thanks
Dream

@IC-Dream
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IC-Dream commented Nov 21, 2018

The fmin.s/fmax.s also exist the same issue when either operand is sNAN. thanks.

@stmach
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stmach commented May 7, 2019

Hello, I was just recently assigned.

Given the age of this issue, you're referencing a bug in the old FPU (https://github.com/pulp-platform/fpu). Since we're moving to a new FPU (https://github.com/pulp-platform/fpnew) which is used in the current and future releases of our cores, we are no longer updating the old FPU.

@stmach stmach closed this as completed May 7, 2019
This was referenced May 7, 2019
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