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Merge from CV32E40X #404
Merged
Silabs-ArjanB
merged 12 commits into
openhwgroup:master
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silabs-oysteink:silabs-oysteink_merge-w6-1
Feb 7, 2023
Merged
Merge from CV32E40X #404
Silabs-ArjanB
merged 12 commits into
openhwgroup:master
from
silabs-oysteink:silabs-oysteink_merge-w6-1
Feb 7, 2023
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Not SEC clean as there is a difference when an exception trigger is enabled. Old cold would get an exception trigger that caused debug entry while new code would not get an exception and enter debug with cause=ebreak. Signed-off-by: Oystein Knauserud <Oystein.Knauserud@silabs.com>
…not-exception Not flagging exception for ebreak if dcsr.ebreakm==1.
…y logic into the FSM. SEC clean. Signed-off-by: Oystein Knauserud <Oystein.Knauserud@silabs.com>
…ld get the wrong debug_cause. This would happen if a synchronous debug reason was in WB at the same time, the taken NMI/interrupt would kill WB but that was not reflected in the debug cause. Signed-off-by: Oystein Knauserud <Oystein.Knauserud@silabs.com>
…pt + single step. SEC clean if an ebreak with dcsr.ebreakm is not flagged as an exception. Bugfix for not flagging ebreak as exception if dcsr.ebreakm is set will come in a separate PR. Signed-off-by: Oystein Knauserud <Oystein.Knauserud@silabs.com>
…eted). Signed-off-by: Oystein Knauserud <Oystein.Knauserud@silabs.com>
…ingle step debug entry in the controller FSM. Signed-off-by: Oystein Knauserud <Oystein.Knauserud@silabs.com>
Signed-off-by: Oystein Knauserud <Oystein.Knauserud@silabs.com>
…e-745 Fix for issue #745
…s, as mintstatus now is an MRO CSR. Updated address for mintstatus in the csr.yaml.m4 file. Signed-off-by: Oystein Knauserud <Oystein.Knauserud@silabs.com>
…e-729 Fix for issue #729
…k_merge-w6-1 Signed-off-by: Oystein Knauserud <Oystein.Knauserud@silabs.com>
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Feb 7, 2023
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Feb 7, 2023
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A new merge will be done shortly which will add privilege level checks to the exception detection for ebreaks. This will better align the sources between X and S and enable a full fix on e40s for the exception/ebreak depending on dcsr.ebrakm and dcsr.ebreaku.