Parameterized SECURE features

[halfdan-dolva]

LEC clean with SECURE=1.

With SECURE=0 and some (to be analyzed) changes in the controller and hacked marchid, this is also LEC clean against the equivalent configuration of CV32E40X.

[halfdan-dolva]

Additional info:

The changes required in the controller for cv32e40x equivalence are the following:

cv32e40s_controller_bypass.sv: assign csr_impl_rd_unqual_id = sys_mret_unqual_id || sys_wfi_unqual_id || sys_wfe_unqual_id || tbljmp_unqual_id;
cv32e40x_controller_bypass.sv: assign csr_impl_rd_unqual_id = sys_mret_unqual_id || tbljmp_unqual_id;

cv32e40s_controller_fsm.sv: assign branch_taken_ex = branch_in_ex && branch_decision_ex_i && !branch_taken_q;
cv32e40x_controller_fsm.sv: assign branch_taken_ex = branch_in_ex && !branch_taken_q;

cv32e40s_controller_fsm.sv: assign async_debug_allowed = lsu_interruptible_i && !fencei_ongoing && !clic_ptr_in_pipeline && sequence_interruptible &&
                                                         !woke_to_interrupt_q && !csr_flush_ack_q && !(ctrl_fsm_cs == SLEEP);
cv32e40x_controller_fsm.sv:                              !woke_to_interrupt_q && !(ctrl_fsm_cs == SLEEP);

cv32e40s_controller_fsm.sv: assign nmi_allowed = lsu_interruptible_i && debug_interruptible && !fencei_ongoing && !clic_ptr_in_pipeline &&
                                                 sequence_interruptible && !(woke_to_debug_q || woke_to_interrupt_q) && !csr_flush_ack_q && !(ctrl_fsm_cs == SLEEP);
cv32e40x_controller_fsm.sv:                      sequence_interruptible && !(woke_to_debug_q || woke_to_interrupt_q) && !(ctrl_fsm_cs == SLEEP);

cv32e40s_controller_fsm.sv: assign branch_in_ex = id_ex_pipe_i.alu_bch && id_ex_pipe_i.alu_en && id_ex_pipe_i.instr_valid;
cv32e40x_controller_fsm.sv: assign branch_in_ex = id_ex_pipe_i.alu_bch && id_ex_pipe_i.alu_en && id_ex_pipe_i.instr_valid && branch_decision_ex_i;

cv32e40s_controller_fsm.sv: assign interrupt_allowed = lsu_interruptible_i && debug_interruptible && !fencei_ongoing && !clic_ptr_in_pipeline &&
                                                       sequence_interruptible && !interrupt_blanking_q && !csr_flush_ack_q && !csr_flush_ack_q && !(ctrl_fsm_cs == SLEEP);
cv32e40x_controller_fsm.sv:                            sequence_interruptible && !interrupt_blanking_q && !(ctrl_fsm_cs == SLEEP);

[Silabs-ArjanB]

Can we use scope names here (is that possible without generate)?

[halfdan-dolva]

As in passing the parameter through the hierarchy?
That should be equivalent both with and without a generate.

[Silabs-ArjanB]

Can we use scope names here (is that possible without generate)?

[Silabs-ArjanB]

Can we use scope names here (is that possible without generate)?

[Silabs-ArjanB]

I mean: if (SECURE) begin : some_name

No need to add parameters, just sensible names for introduced scopes

[halfdan-dolva]

I added names to these ifs, but they won't be visible in formal/sim tools as they are just part of the combinatorial logic in the always blocks.