Merge pull request #864 from silabs-oysteink/silabs-oysteink-issue-808

Fix for issue #808.
openhwgroup · May 30, 2023 · cf16a1e · cf16a1e
2 parents ff3741b + f56233d
commit cf16a1e
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Showing 2 changed files with 5 additions and 5 deletions.
diff --git a/rtl/cv32e40x_alignment_buffer.sv b/rtl/cv32e40x_alignment_buffer.sv
@@ -146,8 +146,8 @@ module cv32e40x_alignment_buffer import cv32e40x_pkg::*;
   //////////////////
   // FIFO signals //
   //////////////////
-  inst_resp_t [0:ALBUF_DEPTH-1]  resp_q;
-  logic [0:ALBUF_DEPTH-1]        valid_n,   valid_int,   valid_q;
+  inst_resp_t [ALBUF_DEPTH-1:0]  resp_q;
+  logic [ALBUF_DEPTH-1:0]        valid_n,   valid_int,   valid_q;
   inst_resp_t resp_n;
 
   // Read/write pointer for FIFO

diff --git a/sva/cv32e40x_alignment_buffer_sva.sv b/sva/cv32e40x_alignment_buffer_sva.sv
@@ -24,15 +24,15 @@ module cv32e40x_alignment_buffer_sva
   (
    input logic                     clk,
    input logic                     rst_n,
-   input logic [0:2]               valid_q,
+   input logic [2:0]               valid_q,
    input ctrl_fsm_t                ctrl_fsm_i,
    input logic [31:0]              branch_addr_i,
    input logic                     fetch_branch_o,
    input logic [31:0]              fetch_branch_addr_o,
    input logic                     fetch_valid_o,
    input logic                     fetch_ready_i,
-   input logic [2:0] instr_cnt_n,
-   input logic [2:0] instr_cnt_q,
+   input logic [2:0]               instr_cnt_n,
+   input logic [2:0]               instr_cnt_q,
    input logic                     instr_valid_o,
    input logic                     instr_ready_i,
    input logic [31:0]              instr_addr_o,