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Fix PMPCFG WARL behavior (#2019)
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Moschn committed Apr 9, 2024
1 parent 1c529d6 commit fa2cea2
Showing 1 changed file with 10 additions and 2 deletions.
12 changes: 10 additions & 2 deletions core/csr_regfile.sv
Original file line number Diff line number Diff line change
Expand Up @@ -2431,9 +2431,17 @@ module csr_regfile
always_comb begin : write
for (int i = 0; i < 16; i++) begin
if (i < CVA6Cfg.NrPMPEntries) begin
// We only support >=8-byte granularity, NA4 is disabled
if(!CVA6Cfg.PMPEntryReadOnly[i] && pmpcfg_d[i].addr_mode != riscv::NA4 && !(pmpcfg_d[i].access_type.r == '0 && pmpcfg_d[i].access_type.w == '1)) begin
if (!CVA6Cfg.PMPEntryReadOnly[i]) begin
// PMP locked logic is handled in the CSR write process above
pmpcfg_next[i] = pmpcfg_d[i];
// We only support >=8-byte granularity, NA4 is disabled
if (pmpcfg_d[i].addr_mode == riscv::NA4) begin
pmpcfg_next[i].addr_mode = pmpcfg_q[i].addr_mode;
end
// Follow collective WARL spec for RWX fields
if (pmpcfg_d[i].access_type.r == '0 && pmpcfg_d[i].access_type.w == '1) begin
pmpcfg_next[i].access_type = pmpcfg_q[i].access_type;
end
end else begin
pmpcfg_next[i] = pmpcfg_q[i];
end
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