8306667: RISC-V: Fix storeImmN0 matching rule by using zr register

[zhengxiaolinX]

The storeImmN0 in the RISC-V backend missed a CompressedOops::base() == NULL predication. Under non-zero-based compressed oops mode, the xheapbase can be a non-zero value and crashes the VM.

Reproduced by <JDK>/bin/java -Xcomp -XX:HeapBaseMinAddress=72030M -version simply. A hs_err file is attached in the JBS issue.

x86 uses r12 as a zero register in storeImmN0, but RISC-V has a zero register so we can use it to implement the matching rule.

Testing in progress.

Thanks,
Xiaolin

---

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Issue

• JDK-8306667: RISC-V: Fix storeImmN0 matching rule by using zr register

Reviewers

• Aleksey Shipilev (@shipilev - Reviewer)
• Guoxiong Li (@lgxbslgx - Committer)
• Fei Yang (@RealFYang - Reviewer)

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[bridgekeeper]

👋 Welcome back xlinzheng! A progress list of the required criteria for merging this PR into master will be added to the body of your pull request. There are additional pull request commands available for use with this pull request.

[openjdk]

@zhengxiaolinX The following label will be automatically applied to this pull request:

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[VladimirKempik]

btw, should this also be backported to 17u-riscv ? after this PR is done

[shipilev]

Looks reasonable.

[zhengxiaolinX]

btw, should this also be backported to 17u-riscv ? after this PR is done

Sure, I can do that after verifying and merging this patch.

[zhengxiaolinX]

Looks reasonable.

Thanks for the review, Aleksey!

[lgxbslgx]

A potential issue in the comment of iRegIHeapbase:

// heap base register -- used for encoding immN0
operand iRegIHeapbase()

And unfortunately, aarch64 has the same issue in iRegIHeapbase since JDK-8242449.

They can be fixed together in a follow-up patch. Or only fix the riscv64 part in this patch and fix the aarch64 part in another patch.

[zhengxiaolinX]

A potential issue in the comment of iRegIHeapbase:

// heap base register -- used for encoding immN0
operand iRegIHeapbase()

And unfortunately, aarch64 has the same issue in iRegIHeapbase since JDK-8242449.

They can be fixed together in a follow-up patch. Or only fix the riscv64 part in this patch and fix the aarch64 part in another patch.

Indeed, iRegIHeapbase gets used nowhere in both backends and thanks for the catching. I can file one patch to clean them up after this.

Though, I think the AArch64 backend does not have this issue because it has the CompressedOops::base() == NULL && CompressedKlassPointers::base() == NULL guard before JDK-8242449 - if I understand your comments correctly?

P.S. Sorry for the delay in this fix - I have tested hotspot tier1~4 on QEMU but still not yet on an unmatched board since mine has other jobs to test. Will carry this fix on soon.

[lgxbslgx]

And unfortunately, aarch64 has the same issue in iRegIHeapbase since JDK-8242449.

Though, I think the AArch64 backend does not have this issue because it has the CompressedOops::base() == NULL && CompressedKlassPointers::base() == NULL guard before JDK-8242449 - if I understand your comments correctly?

the same issue I mentioned means the same unnecessary comments. Sorry for the ambiguity.

[zhengxiaolinX]

Verified hotspot tier1~2 (fastdebug) on my machine.

[openjdk]

@zhengxiaolinX This change now passes all automated pre-integration checks.

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8306667: RISC-V: Fix storeImmN0 matching rule by using zr register

Reviewed-by: shade, gli, fyang

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At the time when this comment was updated there had been 4 new commits pushed to the master branch:

• 73491fa: 8306996: Open source Swing MenuItem related tests
• 33d9a85: 8307572: AArch64: Vector registers are clobbered by some macroassemblers
• 9a7b443: 8307966: ProblemList java/util/concurrent/locks/Lock/OOMEInAQS.java on linux-x64
• 54c06d2: 8307559: Add better checking in com/sun/jdi tests for debuggee exiting unexpectedly with an exception

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[mlbridge]

Webrevs

• 00: Full (754a130e)

[lgxbslgx]

LGTM

[RealFYang]

Nice catch. Looks good.

[zhengxiaolinX]

Thanks for reviewing! @lgxbslgx @RealFYang

/integrate

[openjdk]

@zhengxiaolinX
Your change (at version 754a130) is now ready to be sponsored by a Committer.

[RealFYang]

/sponsor

[openjdk]

Going to push as commit e32de7e.
Since your change was applied there have been 7 commits pushed to the master branch:

• f3bd031: 8307891: ProblemList gtest/NMTGtest.java subtests on aix
• 5f1f946: 8307520: set minimum supported CPU architecture to Power8 on AIX
• ccb4dd6: 8307969: [zgc] Missing includes in gc/z/zTracer.cpp
• 73491fa: 8306996: Open source Swing MenuItem related tests
• 33d9a85: 8307572: AArch64: Vector registers are clobbered by some macroassemblers
• 9a7b443: 8307966: ProblemList java/util/concurrent/locks/Lock/OOMEInAQS.java on linux-x64
• 54c06d2: 8307559: Add better checking in com/sun/jdi tests for debuggee exiting unexpectedly with an exception

Your commit was automatically rebased without conflicts.

[openjdk]

@RealFYang @zhengxiaolinX Pushed as commit e32de7e.

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