Merge pull request #390 from openmv/h7_cache

Use the MPU to make H7 DMA region uncacheable.
openmv · Oct 10, 2018 · d8b914b · d8b914b
2 parents aac1560 + 0f7a404
commit d8b914b
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Showing 3 changed files with 3 additions and 18 deletions.
diff --git a/src/omv/boards/OPENMV4/omv_boardconfig.h b/src/omv/boards/OPENMV4/omv_boardconfig.h
@@ -63,7 +63,7 @@
 #define OMV_VOSPI_MEMORY        SRAM4       // VoSPI buffer memory.
 
 #define OMV_FB_SIZE             (400K)      // FB memory: header + VGA/GS image
-#define OMV_FB_ALLOC_SIZE       (100K)      // minimum fb alloc size
+#define OMV_FB_ALLOC_SIZE       (96K)       // minimum fb alloc size
 #define OMV_STACK_SIZE          (7K)
 #define OMV_HEAP_SIZE           (240K)
 
@@ -88,8 +88,8 @@
 #define OMV_AXI_SRAM_LENGTH     512K
 
 // Use the MPU to set an uncacheable memory region.
-//#define OMV_DMA_REGION_BASE     OMV_SRAMX_ORIGIN
-//#define OMV_DMA_REGION_SIZE     MPU_REGION_SIZE_XXKB
+#define OMV_DMA_REGION_BASE     (OMV_AXI_SRAM_ORIGIN+(500*1024))
+#define OMV_DMA_REGION_SIZE     MPU_REGION_SIZE_16KB
 
 /* SCCB/I2C */
 #define SCCB_I2C                (I2C1)

diff --git a/src/omv/lepton.c b/src/omv/lepton.c
@@ -307,10 +307,6 @@ static int reset(sensor_t *sensor)
     return 0;
 }
 
-#define HAL_CLEANINVALIDATE_DCACHE(addr, size) \
-  (SCB_CleanInvalidateDCache_by_Addr((uint32_t*)((uint32_t)addr & ~0x1f), \
-      ((uint32_t)((uint8_t*)addr + size + 0x1f) & ~0x1f) - ((uint32_t)addr & ~0x1f)))
-
 void HAL_SPI_RxCpltCallback(SPI_HandleTypeDef *hspi)
 {
     (void) lepton_calc_crc; // to shut the compiler up.
@@ -319,9 +315,6 @@ void HAL_SPI_RxCpltCallback(SPI_HandleTypeDef *hspi)
         return; // nothing to do here
     }
 
-    // Invalidate cache prior to access by CPU
-    HAL_CLEANINVALIDATE_DCACHE(vospi_packet, VOSPI_PACKET_SIZE);
-
     if (vospi_pid < vospi_packets && (vospi_packet[0] & 0xF) != 0xF) {
         uint32_t pid = VOSPI_HEADER_PID(vospi_packet);
         uint32_t seg = VOSPI_HEADER_SEG(vospi_packet);

diff --git a/src/sthal/h7/src/stm32h7xx_hal_dcmi.c b/src/sthal/h7/src/stm32h7xx_hal_dcmi.c
@@ -376,10 +376,6 @@ HAL_StatusTypeDef HAL_DCMI_Start_DMA(DCMI_HandleTypeDef* hdcmi, uint32_t DCMI_Mo
   return HAL_OK;
 }
 
-#define MP_HAL_CLEANINVALIDATE_DCACHE(addr, size) \
-  (SCB_CleanInvalidateDCache_by_Addr((uint32_t*)((uint32_t)addr & ~0x1f), \
-      ((uint32_t)((uint8_t*)addr + size + 0x1f) & ~0x1f) - ((uint32_t)addr & ~0x1f)))
-
 HAL_StatusTypeDef HAL_DCMI_Start_DMA_MB(DCMI_HandleTypeDef* hdcmi, uint32_t DCMI_Mode, uint32_t pData, uint32_t Length, uint32_t Count)
 {
   /* Initialise the second memory address */
@@ -422,8 +418,6 @@ HAL_StatusTypeDef HAL_DCMI_Start_DMA_MB(DCMI_HandleTypeDef* hdcmi, uint32_t DCMI
   /* Update second memory address */
   SecondMemAddress = (uint32_t)(pData + (4*hdcmi->XferSize));
 
-  MP_HAL_CLEANINVALIDATE_DCACHE(SecondMemAddress, (hdcmi->XferSize*4));
-
   /* Start DMA multi buffer transfer */
   HAL_DMAEx_MultiBufferStart_IT(hdcmi->DMA_Handle, (uint32_t)&hdcmi->Instance->DR, (uint32_t)pData, SecondMemAddress, hdcmi->XferSize);
 
@@ -889,11 +883,9 @@ static void DCMI_DMAXferCplt(DMA_HandleTypeDef *hdma)
 
   if ((stream->CR & DMA_SxCR_CT) == 0) {
     // Current traget is M0 call user callback with M1
-    MP_HAL_CLEANINVALIDATE_DCACHE(stream->M0AR, (hdcmi->XferSize*4));
     DCMI_DMAConvCpltUser(stream->M1AR);
   } else {
     // Current traget is M1 call user callback with M0
-    MP_HAL_CLEANINVALIDATE_DCACHE(stream->M1AR, (hdcmi->XferSize*4));
     DCMI_DMAConvCpltUser(stream->M0AR);
   }