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Remove further uses of __ARMEL__ in AArch64 assembly
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The sweep of the source tree in #17373 missed the BSAES assembly due its
PR #14592 having been temporarily backed out at the time.

This constitutes a partial fix for #17958 - covers cases except when
configured with -DOPENSSL_AES_CONST_TIME.

Reviewed-by: Matt Caswell <matt@openssl.org>
Reviewed-by: Tomas Mraz <tomas@openssl.org>
(Merged from #17988)

(cherry picked from commit 2bd5cde)
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bavison authored and t8m committed Nov 11, 2022
1 parent c2564d1 commit c6fb30f
Showing 1 changed file with 5 additions and 5 deletions.
10 changes: 5 additions & 5 deletions crypto/aes/asm/bsaes-armv8.pl
Expand Up @@ -951,7 +951,7 @@ sub data
// v15 = last round key (converted to native endianness)
// other SIMD registers corrupted
_bsaes_key_convert:
#ifdef __ARMEL__
#ifdef __AARCH64EL__
adr x11, .LM0_littleendian
#else
adr x11, .LM0_bigendian
Expand All @@ -970,7 +970,7 @@ sub data
movi v22.16b, #0x40
movi v23.16b, #0x80
#ifdef __ARMEL__
#ifdef __AARCH64EL__
rev32 v0.16b, v0.16b
#endif
sub x10, x10, #1
Expand All @@ -996,7 +996,7 @@ sub data
cbnz x10, .Lkey_loop
// don't save last round key
#ifdef __ARMEL__
#ifdef __AARCH64EL__
rev32 v15.16b, v15.16b
adr x11, .LM0_bigendian
#endif
Expand Down Expand Up @@ -1429,7 +1429,7 @@ sub data
mov x22, x3
ldr w23, [x4, #12] // load counter .LSW
ldr q1, [x4] // load whole counter value
#ifdef __ARMEL__
#ifdef __AARCH64EL__
rev w23, w23
#endif
str q1, [sp, #80] // copy counter value
Expand All @@ -1444,7 +1444,7 @@ sub data
ldr q0, [x19], #16 // load input
ldr q1, [sp, #64] // load encrypted counter
add x23, x23, #1
#ifdef __ARMEL__
#ifdef __AARCH64EL__
rev w0, w23
str w0, [sp, #80+12] // next counter value
#else
Expand Down

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