Merge pull request #279 from phanrahan/verilog_inline

Verilog inline
phanrahan · Sep 7, 2018 · 1c99426 · 1c99426
2 parents 301cc9d + 43f01e1
commit 1c99426
Showing 1 changed file with 2 additions and 0 deletions.
diff --git a/magma/compile.py b/magma/compile.py
@@ -80,6 +80,8 @@ def __compile_to_coreir(main, file_name, opts):
             cmd += f" -o \"{split}/*.v\" -s"
         else:
             cmd += f" -o {file_name}.v"
+        if opts.get("inline", False):
+            cmd += " --inline"
         subprocess.run(cmd, shell=True)