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AArch64: Improve immediate expansion [PR105928]
Support immediate expansion of immediates which can be created from 2 MOVKs and a shifted ORR or BIC instruction. Change aarch64_split_dimode_const_store to apply if we save one instruction. This reduces the number of 4-instruction immediates in SPECINT/FP by 5%. Passes regress, OK for commit? gcc/ChangeLog: PR target/105928 * config/aarch64/aarch64.cc (aarch64_internal_mov_immediate) Add support for immediates using shifted ORR/BIC. (aarch64_split_dimode_const_store): Apply if we save one instruction. * config/aarch64/aarch64.md (<LOGICAL:optab>_<SHIFT:optab><mode>3): Make pattern global. gcc/testsuite: PR target/105928 * gcc.target/aarch64/pr105928.c: Add new test. * gcc.target/aarch64/vect-cse-codegen.c: Fix test.
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Original file line number | Diff line number | Diff line change |
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@@ -0,0 +1,43 @@ | ||
/* { dg-do assemble } */ | ||
/* { dg-options "-O2 --save-temps" } */ | ||
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long f1 (void) | ||
{ | ||
return 0x80402010080400; | ||
} | ||
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long f2 (void) | ||
{ | ||
return 0x1234567812345678; | ||
} | ||
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long f3 (void) | ||
{ | ||
return 0x4567800012345678; | ||
} | ||
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long f4 (void) | ||
{ | ||
return 0x3ecccccd3ecccccd; | ||
} | ||
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long f5 (void) | ||
{ | ||
return 0x38e38e38e38e38e; | ||
} | ||
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long f6 (void) | ||
{ | ||
return 0x1745d1745d1745d; | ||
} | ||
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void f7 (long *p) | ||
{ | ||
*p = 0x1234567812345678; | ||
} | ||
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/* { dg-final { scan-assembler-times {\tmovk\t} 7 } } */ | ||
/* { dg-final { scan-assembler-times {\tmov\t} 7 } } */ | ||
/* { dg-final { scan-assembler-times {\tbic\t} 2 } } */ | ||
/* { dg-final { scan-assembler-times {\torr\t} 4 } } */ | ||
/* { dg-final { scan-assembler-times {\tstp\t} 1 } } */ |
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