forked from KiCad/kicad-source-mirror
New File Format Ideas
Thomas Pointhuber edited this page Dec 25, 2018
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10 revisions
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Improved ERC capabilities
- every pin allows multiple modes, which can be selected in schematic
- additional constraints: (analog, digital, digital/SDA,... ), voltage range, electrical net (galvanic separator has two electric independent netgroups)
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multiple subsymbols which are graphically independent
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allow embedding of spice symbols
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embedding of datasheet?
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net ties
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more flexible power Symbol specification
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every element can have arbitrary key-value Pairs
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allow specialization to support atomic parts
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visual alternatives (IEC, ISO, small/big,...)
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pin/gate swapping
- allow logical specification if pin type is allowed there (including optional register allocation check)
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better link between symbol and footprint (pin name instead of number sometimes?)
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pin can hold multiple numbers (proper alternative for pin-stacking)
- Multichannel hierarchical sheets (AD: Multi-Sheet and Multi-Channel Design)
- Allow grouping of parts/nets (AD: Defining Net Classes by Area on a Schematic)
- Subschematic templates which can be imported (LP: Support Design Blocks and prebuild Subschematics, AD: Design Reuse)
- Multiple hierarchical entities which are connected via a bus (like in Altium)
- allow specifying default symbol design for hierarchical sheet
- specifying PCB constraints (diff-pair, cap near IC,...)
- interactive simulation graphs like in qucs
- variants support
- improved bus <-> net style