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bsps/arm: Support recent bootloaders starting kernel in HYP mode
When HYP mode is detected at startup then setup HYP mode vectors table (for future extensions) clean exceptions switching to HYP mode and switch CPU to ARM SVC mode. BSPs which want to use this support need to include next option in their configure.ac RTEMS_BSPOPTS_SET([BSP_START_IN_HYP_SUPPORT],[*],[1]) RTEMS_BSPOPTS_HELP([BSP_START_IN_HYP_SUPPORT], [Support start of BSP in ARM HYP mode]) AM_CONDITIONAL(BSP_START_IN_HYP_SUPPORT,test "$BSP_START_IN_HYP_SUPPORT" = "1") and need to include next lines in corresponding Makefile.am if BSP_START_IN_HYP_SUPPORT libbsp_a_SOURCES += ../shared/startup/bsp-start-in-hyp-support.S endif
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c/src/lib/libbsp/arm/shared/startup/bsp-start-in-hyp-support.S
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/** | ||
* @file | ||
* | ||
* @brief Boot and system start code. | ||
*/ | ||
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/* | ||
* Copyright (c) 2016 Pavel Pisa <pisa@cmp.felk.cvut.cz> | ||
* | ||
* Czech Technical University in Prague | ||
* Zikova 1903/4 | ||
* 166 36 Praha 6 | ||
* Czech Republic | ||
* | ||
* The license and distribution terms for this file may be | ||
* found in the file LICENSE in this distribution or at | ||
* http://www.rtems.org/license/LICENSE. | ||
*/ | ||
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#include <rtems/asm.h> | ||
#include <rtems/system.h> | ||
#include <rtems/score/cpu.h> | ||
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#include <bspopts.h> | ||
#include <bsp/irq.h> | ||
#include <bsp/linker-symbols.h> | ||
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.extern bsp_start_hyp_vector_table_begin | ||
.globl bsp_start_arm_drop_hyp_mode | ||
.globl bsp_arm_drop_hyp_mode_only | ||
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.arm | ||
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/* | ||
* The routine is called from startup code and it should | ||
* preserve all registers except r2 and r3. r0 can be used | ||
* as pass though argument in some cases, a1 is used for | ||
* CPU stack offset during startup and r4 to r6 to preserve | ||
* booloader arguments | ||
*/ | ||
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bsp_start_arm_drop_hyp_mode: | ||
ldr r2, bsp_start_hyp_vector_table_begin_addr | ||
mcr p15, 4, r2, c12, c0, 0 | ||
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mov r2, #0 | ||
mcr p15, 4, r2, c1, c1, 0 | ||
mcr p15, 4, r2, c1, c1, 2 | ||
mcr p15, 4, r2, c1, c1, 3 | ||
/* | ||
* HSCTLR.TE | ||
* optional start of hypervisor handlers in Thumb mode | ||
* orr r0, #(1 << 30) | ||
*/ | ||
mcr p15, 4, r2, c1, c0, 0 /* HSCTLR */ | ||
mrc p15, 4, r2, c1, c1, 1 /* HDCR */ | ||
and r2, #0x1f /* Preserve HPMN */ | ||
mcr p15, 4, r2, c1, c1, 1 /* HDCR */ | ||
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bsp_arm_drop_hyp_mode_only: | ||
/* Prepare SVC mode for eret */ | ||
mrs r2, cpsr | ||
bic r2, r2, #ARM_PSR_M_MASK | ||
orr r2, r2, #ARM_PSR_M_SVC | ||
msr spsr_cxsf, r2 | ||
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adr r2, 1f | ||
.inst 0xe12ef302 /* msr ELR_hyp, r2 */ | ||
mov r2, sp | ||
mov r3, lr | ||
.inst 0xe160006e /* eret */ | ||
1: mov sp, r2 | ||
mov lr, r3 | ||
bx lr | ||
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bsp_start_hyp_vector_table_begin_addr: | ||
.word bsp_start_hyp_vector_table_begin |
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