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Cirq --> pyQuil transpiler error for XX, YY, ZZ gates #386
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Hi @ryanhill1 , would you kindly assign this issue to me? (or another 'good first issue' as you see fit) |
Hi @krpcannon, absolutely! Upon further investigation, this is actually a bug in def _xxpow_gate(op: cirq.Operation, formatter: QuilFormatter) -> str:
gate = cast(cirq.XPowGate, op.gate)
if gate._exponent == 1:
return formatter.format('X {0}\nX {1}\n', op.qubits[0], op.qubits[1])
return formatter.format(
'RX({0}) {1}\nRX({2}) {3}\n',
gate._exponent * np.pi,
op.qubits[0],
gate._exponent * np.pi,
op.qubits[1],
) which uses two PyQuil >>> import cirq
>>> q0, q1 = cirq.LineQubit.range(2)
>>> circuit = cirq.Circuit()
>>> circuit.append(cirq.XXPowGate(exponent=0.5).on(q0,q1)
>>> print(circuit.to_qasm())
// Generated from Cirq v1.3.0.dev20230825224332
OPENQASM 2.0;
include "qelib1.inc";
// Qubits: [q(0), q(1)]
qreg q[2];
// Gate: XX**0.5
ry(pi*-0.5) q[0];
ry(pi*-0.5) q[1];
s q[0];
s q[1];
u3(pi*0.5,0,pi*1.25) q[0];
u3(pi*0.5,pi*1.0,pi*1.75) q[1];
sx q[0];
cx q[0],q[1];
rx(0) q[0];
ry(pi*0.5) q[1];
cx q[1],q[0];
sxdg q[1];
s q[1];
cx q[0],q[1];
u3(pi*0.5,pi*1.25,pi*1.0) q[0];
u3(pi*0.5,pi*0.75,0) q[1];
ry(pi*0.5) q[0];
ry(pi*0.5) q[1]; and converted the decomposed gate set. However, if there is a more compact solution, that would be preferred. |
There is a bug transpiling Cirq circuits containing the
XXPowGate
,YYPowGate
orZZPowGate
to pyQuil. Below is a self-contained example showing the bug for theXXPowGate
:The text was updated successfully, but these errors were encountered: