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qos-test: sdhci test node
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Convert tests/sdhci-test in first qgraph test node, sdhci-test. This test
consumes an sdhci interface and checks that its function return the
expected values.

Note that this test does not allocate any sdhci structure, it's all done by the
qtest walking graph mechanism

Signed-off-by: Emanuele Giuseppe Esposito <e.emanuelegiuseppe@gmail.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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@esposem @bonzini
esposem authored and bonzini committed Mar 7, 2019
1 parent 555299c commit 757c6ea
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Showing 2 changed files with 24 additions and 168 deletions.
7 changes: 3 additions & 4 deletions tests/Makefile.include
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Original file line number Diff line number Diff line change
Expand Up @@ -229,7 +229,6 @@ check-qtest-i386-y += tests/test-announce-self$(EXESUF)
check-qtest-i386-y += tests/test-x86-cpuid-compat$(EXESUF)
check-qtest-i386-y += tests/numa-test$(EXESUF)
check-qtest-x86_64-y += $(check-qtest-i386-y)
check-qtest-x86_64-$(CONFIG_SDHCI) += tests/sdhci-test$(EXESUF)

check-qtest-alpha-y += tests/boot-serial-test$(EXESUF)
check-qtest-alpha-$(CONFIG_VGA) += tests/display-vga-test$(EXESUF)
Expand Down Expand Up @@ -299,11 +298,9 @@ check-qtest-arm-y += tests/m25p80-test$(EXESUF)
check-qtest-arm-$(CONFIG_VIRTIO_BLK) += tests/virtio-blk-test$(EXESUF)
check-qtest-arm-y += tests/test-arm-mptimer$(EXESUF)
check-qtest-arm-y += tests/boot-serial-test$(EXESUF)
check-qtest-arm-$(CONFIG_SDHCI) += tests/sdhci-test$(EXESUF)
check-qtest-arm-y += tests/hexloader-test$(EXESUF)

check-qtest-aarch64-y = tests/numa-test$(EXESUF)
check-qtest-aarch64-$(CONFIG_SDHCI) += tests/sdhci-test$(EXESUF)
check-qtest-aarch64-y += tests/boot-serial-test$(EXESUF)
check-qtest-aarch64-y += tests/migration-test$(EXESUF)

Expand Down Expand Up @@ -762,6 +759,9 @@ qos-test-obj-y += tests/libqos/arm-smdkc210-machine.o
qos-test-obj-y += tests/libqos/arm-xilinx-zynq-a9-machine.o
qos-test-obj-y += tests/libqos/x86_64_pc-machine.o

# Tests
qos-test-obj-y += tests/sdhci-test.o

check-unit-y += tests/test-qgraph$(EXESUF)
tests/test-qgraph$(EXESUF): tests/test-qgraph.o $(libqgraph-obj-y)

Expand Down Expand Up @@ -857,7 +857,6 @@ tests/test-arm-mptimer$(EXESUF): tests/test-arm-mptimer.o
tests/test-qapi-util$(EXESUF): tests/test-qapi-util.o $(test-util-obj-y)
tests/numa-test$(EXESUF): tests/numa-test.o
tests/vmgenid-test$(EXESUF): tests/vmgenid-test.o tests/boot-sector.o tests/acpi-utils.o
tests/sdhci-test$(EXESUF): tests/sdhci-test.o $(libqos-pc-obj-y)
tests/cdrom-test$(EXESUF): tests/cdrom-test.o tests/boot-sector.o $(libqos-obj-y)

tests/migration/stress$(EXESUF): tests/migration/stress.o
Expand Down
185 changes: 21 additions & 164 deletions tests/sdhci-test.c
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Original file line number Diff line number Diff line change
Expand Up @@ -12,6 +12,8 @@
#include "libqtest.h"
#include "libqos/pci-pc.h"
#include "hw/pci/pci.h"
#include "libqos/qgraph.h"
#include "libqos/sdhci.h"

#define SDHC_CAPAB 0x40
FIELD(SDHC_CAPAB, BASECLKFREQ, 8, 8); /* since v2 */
Expand All @@ -20,99 +22,11 @@ FIELD(SDHC_CAPAB, SDR, 32, 3); /* since v3 */
FIELD(SDHC_CAPAB, DRIVER, 36, 3); /* since v3 */
#define SDHC_HCVER 0xFE

static const struct sdhci_t {
const char *arch, *machine;
struct {
uintptr_t addr;
uint8_t version;
uint8_t baseclock;
struct {
bool sdma;
uint64_t reg;
} capab;
} sdhci;
struct {
uint16_t vendor_id, device_id;
} pci;
} models[] = {
/* PC via PCI */
{ "x86_64", "pc",
{-1, 2, 0, {1, 0x057834b4} },
.pci = { PCI_VENDOR_ID_REDHAT, PCI_DEVICE_ID_REDHAT_SDHCI } },

/* Exynos4210 */
{ "arm", "smdkc210",
{0x12510000, 2, 0, {1, 0x5e80080} } },

/* i.MX 6 */
{ "arm", "sabrelite",
{0x02190000, 3, 0, {1, 0x057834b4} } },

/* BCM2835 */
{ "arm", "raspi2",
{0x3f300000, 3, 52, {0, 0x052134b4} } },

/* Zynq-7000 */
{ "arm", "xilinx-zynq-a9", /* Datasheet: UG585 (v1.12.1) */
{0xe0100000, 2, 0, {1, 0x69ec0080} } },

/* ZynqMP */
{ "aarch64", "xlnx-zcu102", /* Datasheet: UG1085 (v1.7) */
{0xff160000, 3, 0, {1, 0x280737ec6481} } },

};

typedef struct QSDHCI {
struct {
QPCIBus *bus;
QPCIDevice *dev;
} pci;
union {
QPCIBar mem_bar;
uint64_t addr;
};
} QSDHCI;

static uint16_t sdhci_readw(QSDHCI *s, uint32_t reg)
{
uint16_t val;

if (s->pci.dev) {
val = qpci_io_readw(s->pci.dev, s->mem_bar, reg);
} else {
val = qtest_readw(global_qtest, s->addr + reg);
}

return val;
}

static uint64_t sdhci_readq(QSDHCI *s, uint32_t reg)
{
uint64_t val;

if (s->pci.dev) {
val = qpci_io_readq(s->pci.dev, s->mem_bar, reg);
} else {
val = qtest_readq(global_qtest, s->addr + reg);
}

return val;
}

static void sdhci_writeq(QSDHCI *s, uint32_t reg, uint64_t val)
{
if (s->pci.dev) {
qpci_io_writeq(s->pci.dev, s->mem_bar, reg, val);
} else {
qtest_writeq(global_qtest, s->addr + reg, val);
}
}

static void check_specs_version(QSDHCI *s, uint8_t version)
{
uint32_t v;

v = sdhci_readw(s, SDHC_HCVER);
v = s->readw(s, SDHC_HCVER);
v &= 0xff;
v += 1;
g_assert_cmpuint(v, ==, version);
Expand All @@ -122,7 +36,7 @@ static void check_capab_capareg(QSDHCI *s, uint64_t expec_capab)
{
uint64_t capab;

capab = sdhci_readq(s, SDHC_CAPAB);
capab = s->readq(s, SDHC_CAPAB);
g_assert_cmphex(capab, ==, expec_capab);
}

Expand All @@ -131,11 +45,11 @@ static void check_capab_readonly(QSDHCI *s)
const uint64_t vrand = 0x123456789abcdef;
uint64_t capab0, capab1;

capab0 = sdhci_readq(s, SDHC_CAPAB);
capab0 = s->readq(s, SDHC_CAPAB);
g_assert_cmpuint(capab0, !=, vrand);

sdhci_writeq(s, SDHC_CAPAB, vrand);
capab1 = sdhci_readq(s, SDHC_CAPAB);
s->writeq(s, SDHC_CAPAB, vrand);
capab1 = s->readq(s, SDHC_CAPAB);
g_assert_cmpuint(capab1, !=, vrand);
g_assert_cmpuint(capab1, ==, capab0);
}
Expand All @@ -147,7 +61,7 @@ static void check_capab_baseclock(QSDHCI *s, uint8_t expec_freq)
if (!expec_freq) {
return;
}
capab = sdhci_readq(s, SDHC_CAPAB);
capab = s->readq(s, SDHC_CAPAB);
capab_freq = FIELD_EX64(capab, SDHC_CAPAB, BASECLKFREQ);
g_assert_cmpuint(capab_freq, ==, expec_freq);
}
Expand All @@ -156,7 +70,7 @@ static void check_capab_sdma(QSDHCI *s, bool supported)
{
uint64_t capab, capab_sdma;

capab = sdhci_readq(s, SDHC_CAPAB);
capab = s->readq(s, SDHC_CAPAB);
capab_sdma = FIELD_EX64(capab, SDHC_CAPAB, SDMA);
g_assert_cmpuint(capab_sdma, ==, supported);
}
Expand All @@ -167,86 +81,29 @@ static void check_capab_v3(QSDHCI *s, uint8_t version)

if (version < 3) {
/* before v3 those fields are RESERVED */
capab = sdhci_readq(s, SDHC_CAPAB);
capab = s->readq(s, SDHC_CAPAB);
capab_v3 = FIELD_EX64(capab, SDHC_CAPAB, SDR);
g_assert_cmpuint(capab_v3, ==, 0);
capab_v3 = FIELD_EX64(capab, SDHC_CAPAB, DRIVER);
g_assert_cmpuint(capab_v3, ==, 0);
}
}

static QSDHCI *machine_start(const struct sdhci_t *test)
{
QSDHCI *s = g_new0(QSDHCI, 1);

if (test->pci.vendor_id) {
/* PCI */
uint16_t vendor_id, device_id;
uint64_t barsize;

global_qtest = qtest_initf("-machine %s -device sdhci-pci",
test->machine);

s->pci.bus = qpci_new_pc(global_qtest, NULL);

/* Find PCI device and verify it's the right one */
s->pci.dev = qpci_device_find(s->pci.bus, QPCI_DEVFN(4, 0));
g_assert_nonnull(s->pci.dev);
vendor_id = qpci_config_readw(s->pci.dev, PCI_VENDOR_ID);
device_id = qpci_config_readw(s->pci.dev, PCI_DEVICE_ID);
g_assert(vendor_id == test->pci.vendor_id);
g_assert(device_id == test->pci.device_id);
s->mem_bar = qpci_iomap(s->pci.dev, 0, &barsize);
qpci_device_enable(s->pci.dev);
} else {
/* SysBus */
global_qtest = qtest_initf("-machine %s", test->machine);
s->addr = test->sdhci.addr;
}

return s;
}

static void machine_stop(QSDHCI *s)
{
qpci_free_pc(s->pci.bus);
g_free(s->pci.dev);
qtest_quit(global_qtest);
g_free(s);
}

static void test_machine(const void *data)
static void test_registers(void *obj, void *data, QGuestAllocator *alloc)
{
const struct sdhci_t *test = data;
QSDHCI *s;
QSDHCI *s = obj;

s = machine_start(test);

check_specs_version(s, test->sdhci.version);
check_capab_capareg(s, test->sdhci.capab.reg);
check_specs_version(s, s->props.version);
check_capab_capareg(s, s->props.capab.reg);
check_capab_readonly(s);
check_capab_v3(s, test->sdhci.version);
check_capab_sdma(s, test->sdhci.capab.sdma);
check_capab_baseclock(s, test->sdhci.baseclock);

machine_stop(s);
check_capab_v3(s, s->props.version);
check_capab_sdma(s, s->props.capab.sdma);
check_capab_baseclock(s, s->props.baseclock);
}

int main(int argc, char *argv[])
static void register_sdhci_test(void)
{
const char *arch = qtest_get_arch();
char *name;
int i;

g_test_init(&argc, &argv, NULL);
for (i = 0; i < ARRAY_SIZE(models); i++) {
if (strcmp(arch, models[i].arch)) {
continue;
}
name = g_strdup_printf("sdhci/%s", models[i].machine);
qtest_add_data_func(name, &models[i], test_machine);
g_free(name);
}

return g_test_run();
qos_add_test("registers", "sdhci", test_registers, NULL);
}

libqos_init(register_sdhci_test);

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