We read every piece of feedback, and take your input very seriously.
To see all available qualifiers, see our documentation.
Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.
By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.
Already on GitHub? Sign in to your account
Project->Load Verilog-A module has no effect. No new symbol appears in "verilog-a devices" group. Probably it may be related to #283
The text was updated successfully, but these errors were encountered:
Fixed symbol loading for Verilog-A devices #321
107865a
I have added a fix for this on current branch. Closing as completed.
current
Sorry, something went wrong.
Is there some Verilog-A test projects you can post? I have a number of them for Qucs 0.0.19 but porting them over to Qucs-S is problematic.
No branches or pull requests
Project->Load Verilog-A module has no effect. No new symbol appears in "verilog-a devices" group. Probably it may be related to #283
The text was updated successfully, but these errors were encountered: