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added flag for enabling 4 bits for bitmap / charbase pointer (1 KB al…
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…igned pointers)
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SNB committed Jan 31, 2023
1 parent adacea0 commit 5cf9daf
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Showing 5 changed files with 67 additions and 9 deletions.
2 changes: 1 addition & 1 deletion boards/rev_4H/build.sh
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Expand Up @@ -4,7 +4,7 @@ mkdir -p build
#MAJ=1
MAJ=0
#MIN=12
MIN=2
MIN=3

#ALL="MAINLH DOTCLH MKIILH SARULH"
ALL="WIV1LH"
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4 changes: 2 additions & 2 deletions disks/util/flash/Makefile.LH
View file
@@ -1,8 +1,8 @@
include Makefile.inc

DISKNUMS=1 2 3 4 5
NAME=whatif
VERSION=0.2
NAME=WhatIf
VERSION=0.3
FPGA=efinix_t20
START_ADDRESS=659456
IMAGE_SIZE=659456
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33 changes: 33 additions & 0 deletions hdl/addressgen.v
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Expand Up @@ -87,7 +87,12 @@ module addressgen(
input dma_done,
input [15:0] dma_addr,
`endif
`ifdef WIV_EXTENSIONS
input [3:0] cb,
input wiv_xmp,
`else
input [2:0] cb,
`endif
input [9:0] vc,
input [3:0] vm,
input [2:0] rc,
Expand Down Expand Up @@ -163,19 +168,47 @@ begin
// old exclusively. But then we don't match VICE addresses
// in the sync and we're assuming VICE is right.
if (bmm_old | bmm_now) // bmm at start of half cycle
`ifdef WIV_EXTENSIONS
if (wiv_xmp)
vic_addr = {cb + { 1'b0, vc[9:7]}, vc[6:0], rc}; // bitmap data
else
vic_addr = {cb[3], vc, rc}; // bitmap data
`else
vic_addr = {cb[2], vc, rc}; // bitmap data
`endif
else
`ifdef WIV_EXTENSIONS
if (wiv_xmp)
vic_addr = {cb + { 3'b000, char_ptr[7]}, char_ptr[6:0], rc}; // character pixels
else
vic_addr = {cb[3:1], char_ptr, rc}; // character pixels
`else
vic_addr = {cb, char_ptr, rc}; // character pixels
`endif
if (ecm_now) // ecm at start of half cycle
vic_addr[10:9] = 2'b00;

// This section determines the address that the new
// bmm value (if it changed) determines and will be placed
// on the address bus shortly after CAS falls.
if (bmm_now) // bmm we transitioned to during the half cycle
`ifdef WIV_EXTENSIONS
if (wiv_xmp)
vic_addr_now = {cb + { 1'b0, vc[9:7]}, vc[6:0], rc}; // bitmap data
else
vic_addr_now = {cb[3], vc, rc}; // bitmap data
`else
vic_addr_now = {cb[2], vc, rc}; // bitmap data
`endif
else
`ifdef WIV_EXTENSIONS
if (wiv_xmp)
vic_addr_now = {cb + { 3'b000, char_ptr[7]}, char_ptr[6:0], rc}; // character pixels
else
vic_addr_now = {cb[3:1], char_ptr, rc}; // character pixels
`else
vic_addr_now = {cb, char_ptr, rc}; // character pixels
`endif
if (ecm_now) // current ecm
vic_addr_now[10:9] = 2'b00;
end
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24 changes: 18 additions & 6 deletions hdl/registers.v
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Expand Up @@ -83,7 +83,11 @@ module registers
output reg handle_sprite_crunch,
output reg [7:0] dbo,
output reg [7:0] last_bus,
`ifdef WIV_EXTENSIONS
output reg [3:0] cb,
`else
output reg [2:0] cb,
`endif
output reg [3:0] vm,
output reg elp,
output reg emmc,
Expand Down Expand Up @@ -182,7 +186,7 @@ module registers

`ifdef WIV_EXTENSIONS
output reg wiv_cre = 1'b0, // VIC-WIV control registers read enable
output reg wiv_cr3_unused_1 = 1'b0,
output reg wiv_xmp = 1'b0, // VIC-WIV extended memory pointers: enable all bits of register $18
output reg wiv_dvb = 1'b0, // VIC-WIV disable vertical border
output reg wiv_dmb = 1'b0, // VIC-WIV disable main border
output reg [7:4] wiv_cr3_unused = 4'b0000,
Expand Down Expand Up @@ -852,7 +856,7 @@ begin
/* 0x13 */ `REG_LIGHT_PEN_X: begin
if (wiv_cre) begin
dbo[0] <= wiv_cre;
dbo[1] <= wiv_cr3_unused_1;
dbo[1] <= wiv_xmp;
dbo[2] <= wiv_dvb;
dbo[3] <= wiv_dmb;
dbo[7:4] <= wiv_cr3_unused;
Expand All @@ -861,11 +865,10 @@ begin
end
end
/* 0x14 */ `REG_LIGHT_PEN_Y: begin
if (wiv_cre) begin
if (wiv_cre)
dbo[7:0] <= wiv_cr4_unused;
end else begin
else
dbo[7:0] <= lpx;
end
end
`else
/* 0x13 */ `REG_LIGHT_PEN_X: dbo[7:0] <= lpx;
Expand All @@ -878,8 +881,13 @@ begin
/* 0x17 */ `REG_SPRITE_EXPAND_Y:
dbo[7:0] <= sprite_ye;
/* 0x18 */ `REG_MEMORY_SETUP: begin
`ifdef WIV_EXTENSIONS
dbo[0] <= cb[0] | ~wiv_xmp;
dbo[3:1] <= cb[3:1];
`else
dbo[0] <= 1'b1;
dbo[3:1] <= cb[2:0];
`endif
dbo[7:4] <= vm[3:0];
end
// NOTE: Our irq is inverted already
Expand Down Expand Up @@ -1110,7 +1118,7 @@ begin
`ifdef WIV_EXTENSIONS
/* 0x13 */ `REG_LIGHT_PEN_X: begin
wiv_cre <= dbi[0];
wiv_cr3_unused_1 <= dbi[1];
wiv_xmp <= dbi[1];
wiv_dvb <= dbi[2];
wiv_dmb <= dbi[3];
wiv_cr3_unused[7:4] = dbi[7:4];
Expand All @@ -1132,7 +1140,11 @@ begin
sprite_ye <= dbi[7:0];
end
/* 0x18 */ `REG_MEMORY_SETUP: begin
`ifdef WIV_EXTENSIONS
cb[3:0] <= dbi[3:0];
`else
cb[2:0] <= dbi[3:1];
`endif
vm[3:0] <= dbi[7:4];
end
/* 0x19 */ `REG_INTERRUPT_STATUS: begin
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13 changes: 13 additions & 0 deletions hdl/vicii.v
View file
Expand Up @@ -233,7 +233,11 @@ wire [2:0] sprite_cnt;

// Video matrix and character banks.
wire [3:0] vm;
`ifdef WIV_EXTENSIONS
wire [3:0] cb;
`else
wire [2:0] cb;
`endif

// cycleNum : Each cycle is 8 pixels.
// 6567R56A : 0-63
Expand Down Expand Up @@ -307,6 +311,7 @@ reg hires_badline;

`ifdef WIV_EXTENSIONS
wire wiv_cre; // VIC-WIV control registers read enable
wire wiv_xmp; // VIC-WIV extended memory pointers: enable all bits of register $18
wire wiv_dvb; // VIC-WIV disable vertical border
wire wiv_dmb; // VIC-WIV disable main border
`endif
Expand Down Expand Up @@ -857,6 +862,9 @@ addressgen vic_addressgen(
.clk_dot4x(clk_dot4x),
.clk_col16x(clk_col16x_4tm),
.cb(cb),
`ifdef WIV_EXTENSIONS
.wiv_xmp(wiv_xmp),
`endif
`ifdef WITH_RAM
.dma_done(dma_done),
.dma_addr(dma_addr),
Expand Down Expand Up @@ -893,7 +901,11 @@ hires_addressgen vic_hires_addressgen(
.rc(hires_rc),
.vc(hires_vc),
.fvc(hires_fvc),
`ifdef WIV_EXTENSIONS
.char_case(cb[1]),
`else
.char_case(cb[0]),
`endif
.video_mem_addr(video_ram_addr_b),
.video_mem_data(video_ram_data_out_b),
.hires_pixel_data(hires_pixel_data),
Expand Down Expand Up @@ -1115,6 +1127,7 @@ registers vic_registers(
`endif // WITH_EXTENSIONS
`ifdef WIV_EXTENSIONS
.wiv_cre(wiv_cre),
.wiv_xmp(wiv_xmp),
.wiv_dvb(wiv_dvb),
.wiv_dmb(wiv_dmb),
`endif
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