Kernel dmesg UART output is garbled using the ttyS0/mini-UART/8250 on 5.17

[pelwell]

Describe the bug

Messages from the kernel over the mini-UART (ttyS0) while booting 5.17 are garbled:

MESS:00:00:03.912325:0: uart: Set PL011 baud rate to 103448.300000 Hz
MESS:00:00:03.918842:0: uart: Baud rate change done...
[    0.00is7vlo-n-u.n00dift)Ma:Mud rate[    0.00oip
                                [    0.00P7sfe4)c[    0.00Piiip n[    0.00P ni Vasn
                                                                                   [    0.00FMma dv[    0.00aa [    0.00elt l[    0.00emcCra0iM[    0.00Fv iecpido[    0.00oe[    0.00  x000f[    0.00
                                                        [    0.00ootc
                                                                     [    0.00ao
                                                                                 [    0.00 00000f[    0.00nee 000f
                                                                                                                  [    0.00em1/72
                                                                                                                                  [    0.00uo,ti a3[    0.00emnrl0t_.cld5_vm10__3 m=0mb0sS0eoU7 y p t p.so

It appears that only a subset of the characters are getting through. The fact that the first 8 or 9 characters on a line are getting through intact suggests there is confusion over the FIFO size (which is a uniquely paltry 8).

ttyAMA0 (a PL011) is unaffected.

Observed on a 4B and 3B, but probably affects all Pis.

An investigation is underway.

Steps to reproduce the behaviour

Install a 5.17 kernel, put enable_uart=1 in config.txt (and not dtoverlay=disable-bt), and hook up a serial cable.

Device (s)

Raspberry Pi 3 Mod. B, Raspberry Pi 4 Mod. B

System

pi@raspberrypi:~$ uname -a
Linux raspberrypi 5.17.0-rc1-v7l+ #904 SMP Wed Jan 26 12:59:04 GMT 2022 armv7l GNU/Linux

Logs

See above.

Additional context

No response

[pelwell]

Reverting 5021d70 (a patch that enables use of the FIFO) fixes it.

[popcornmix]

Does setting fifosize to 8 also work?

[pelwell]

No - fifosize is already set to 8...

[pelwell]

Ah - this comment must be significant:

		/* The BCM2835 MINI UART THRE bit is really a not-full bit. */
		if ((up->capabilities & UART_CAP_MINI) &&
		    !(serial_in(up, UART_LSR) & UART_LSR_THRE))
			break;

The easy (and possibly best) fix is to disable FIFO use if UART_CAP_MINI is set.

[pelwell]

Fixed by ba71fc8, which will be pushed upstream.

[pelwell]

Greg KH says he's dropped the offending patch, so at some point this fix will fail to apply.