Fix documentation links from broken merge | Cleanup Uarch counter sec…

…tion
riscv-boom · Jan 29, 2019 · 3075248 · 3075248
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Showing 5 changed files with 15 additions and 15 deletions.
diff --git a/docs/sections/bibliography/bibliography.rst b/docs/sections/bibliography/bibliography.rst
@@ -1,5 +1,5 @@
 Bibliography
 ============
 
-.. bibliography:: /sections/Bibliography/bibliography.bib
+.. bibliography:: /sections/bibliography/bibliography.bib
     :all:
diff --git a/docs/sections/branch-prediction/index.rst b/docs/sections/branch-prediction/index.rst
@@ -18,9 +18,9 @@ predictor" (NLP) and a slower but more complex “backing predictor"
     :maxdepth: 2
     :caption: Branch Prediction:
 
-    Rocket-NLP-Predictor
-    Backing-Predictor
-    Configurations
+    rocket-nl-predictor
+    backing-predictor
+    configurations
 
 .. [1] Unfortunately, the terminology in the literature gets a bit
     muddled here in what to call different types and levels of branch

diff --git a/docs/sections/intro-overview/index.rst b/docs/sections/intro-overview/index.rst
@@ -15,9 +15,9 @@ The source code to BOOM can be found at https://github.com/riscv-boom/riscv-boom
     :maxdepth: 2
     :caption: Introduction and Overview:
 
-    BOOM-Pipeline
-    RISCV-ISA
-    Chisel-HCL
-    Quick-start
-    BOOM-Repository
-    Rocket-Chip
+    boom-pipeline
+    riscv-isa
+    chisel-hcl
+    quick-start
+    boom-repository
+    rocket-chip
diff --git a/docs/sections/intro-overview/rocket-chip.rst b/docs/sections/intro-overview/rocket-chip.rst
@@ -1,5 +1,5 @@
-The Rocket-Chip Repository Layout
-====================================
+The Rocket-Chip Repository
+==========================
 
 .. _boom-chip:
 .. figure:: /figures/chip.png

diff --git a/docs/sections/uarch-counters.rst b/docs/sections/uarch-counters.rst
@@ -14,11 +14,11 @@ The available HPE's are split into *event sets* and *events*.
 *Event sets* are groupings of similar microarchitectural *events* (branch prediction events,
 memory events, etc). To access an *HPE* you must choose the correct *event set* and
 *event* bit and write to the proper HPE register for that event. An example of event set
-numbers and the event bit for a particular event is given in :ref:`uarch-counter-table`.
+numbers and the event bit for a particular event is given below.
 
 .. _uarch-counter-table:
+    :caption: UArch Event Sets and Events
 
-Table: UArch Events
 +-------------+-----------+--------------------------------+
 | Event Set # | Event Bit | Description                    |
 +=============+===========+================================+
@@ -33,7 +33,7 @@ To access an HPC, you must first set up the privilege access level
 of the particular HPC using ``mcounteren`` and ``scounteren``. Afterwards,
 you write to the particular HPE register to setup which event(s) you want to
 track. The value to write to the HPE register is in bits [7:0] the event set
-and in bits [...:8] the event bitmask. Note that the bitmask can be a
+and in bits [?:8] the event bitmask. Note that the bitmask can be a
 singular event **or** multiple events.
 
 .. _enable-uarch-counters: