Grammer/Sentence Fixes | Consistent Rocket-Chip naming

docs/sections/Execute/execute.rst

@@ -72,7 +72,7 @@ efficiently.
 
 For this reason, BOOM uses an abstract Functional Unit class to “wrap"
 expert-written, low-level functional units from the Rocket repository
-(see :ref:`The Rocket-chip Repository Layout`). However, the expert-written functional units
+(see :ref:`The Rocket-Chip Repository Layout`). However, the expert-written functional units
 created for the Rocket in-order processor make assumptions about
 in-order issue and commit points (namely, that once an instruction has
 been dispatched to them it will never need to be killed). These

docs/sections/IntroductionOverview/BOOM-Repository.rst

@@ -3,7 +3,7 @@ The BOOM Repository
 
 The BOOM repository holds the source code to the BOOM core; it is not a
 full processor and thus is **NOT A SELF-RUNNING** repository. To
-instantiate a BOOM core, the Rocket chip generator found in the
+instantiate a BOOM core, the Rocket-Chip generator found in the
 rocket-chip git repository must be used
 https://github.com/freechipsproject/rocket-chip, which provides the caches,
 uncore, and other needed infrastructure to support a full processor.

docs/sections/IntroductionOverview/Rocket-Chip.rst

@@ -1,4 +1,4 @@
-The Rocket-chip Repository Layout
+The Rocket-Chip Repository Layout
 ====================================
 
 .. _boom-chip:
@@ -8,15 +8,15 @@ The Rocket-chip Repository Layout
     A single-core "BOOM-chip", with no L2 last-level cache
 
 As BOOM is just a core, an entire SoC infrastructure must be provided.
-BOOM was developed to use the open-source Rocket-chip SoC generator
-https://github.com/freechipsproject/rocket-chip. The Rocket-chip generator
+BOOM was developed to use the open-source Rocket-Chip SoC generator
+https://github.com/freechipsproject/rocket-chip. The Rocket-Chip generator
 can instantiate a wide range of SoC designs, including cache-coherent
 multi-tile designs, cores with and without accelerators, and chips with
 or without a last-level shared cache.
 
 To manage the wide array of actively developed projects that encompass
-Rocket-chip, the Rocket-chip repository makes heavy use of git
-submodules. Selected directories of the Rocket-chip repository is
+Rocket-Chip, the Rocket-Chip repository makes heavy use of git
+submodules. Selected directories of the Rocket-Chip repository are 
 shown below.
 
 * :code:`rocket-chip/`
@@ -45,7 +45,7 @@ found at http://hwacha.org.
 Rocket has been taped out at least thirteen times in three different
 commercial processes, and has been successfully demonstrated to reach
 over 1.65 GHz in IBM 45 nm SOI. As its namesake suggests,
-Rocket is the baseline core for the Rocket-chip SoC generator. As
+Rocket is the baseline core for the Rocket-Chip SoC generator. As
 discussed earlier, BOOM is instantiated by replacing a Rocket tile with
 a BOOM tile.
 

docs/sections/MemorySystemDCacheShim/memory.rst

@@ -1,10 +1,10 @@
 The Memory System and the Data-cache Shim
 =========================================
 
-BOOM uses the Rocket non-blocking cache (“Hellacache"). Designed for use
+BOOM uses the Rocket-Chip non-blocking cache (“Hellacache"). Designed for use
 in in-order processors, a “shim” is used to connect BOOM to the
 data cache. The source code for the cache can be found in
-nbdcache.scala in the Rocket repository (https://github.com/freechipsproject/rocket-chip).
+nbdcache.scala in the Rocket-Chip repository (https://github.com/freechipsproject/rocket-chip).
 
 The contract with the cache is that it may execute all memory operations
 sent to it (barring structural hazards). As BOOM will send speculative

docs/sections/Parameters/parameterization.rst

@@ -7,7 +7,8 @@ BOOM Parameters
 General Parameters
 ~~~~~~~~~~~~~~~~~~
 
-Listing :numref:`general-boom-params` lists of most of the top-level parameters that you can manipulate for a BOOM core.
+Listing :numref:`general-boom-params` lists most of the top-level
+parameters that you can manipulate for a BOOM core.
 This is taken from :code:`src/main/scala/common/parameters.scala`.
 
 .. _general-boom-params:
@@ -70,7 +71,7 @@ This is taken from :code:`src/main/scala/common/parameters.scala`.
 Other Parameters
 ------------------------
 
-You can also manipulate other parameters such as Rocket Chip parameters, Uncore, BTB, BIM,
+You can also manipulate other parameters such as Rocket-Chip parameters, Uncore, BTB, BIM,
 BPU, and more! To start exploring look at the default configs given in :code:`src/main/scala/common/configs.scala`
 and :code:`src/main/scala/common/Configs.scala` to get a sample of
 BOOM configurations.

docs/sections/Verification/verification.rst

@@ -2,7 +2,7 @@ Verification
 ============
 
 This chapter covers the current recommended techniques for verifying
-BOOM. Although not provided as part of the BOOM or Rocket Chip
+BOOM. Although not provided as part of the BOOM or Rocket-Chip
 repositories, it is also recommended that BOOM be tested on “hello-world
 + riscv-pk" and the RISC-V port of Linux to properly stress the
 processor.
@@ -33,7 +33,7 @@ are run using which BOOM configurations. Additionally, the DockerFile used to
 build the CI docker images resides in :code:`.circleci/images`. Finally, all
 scripts that are used during the CI run are located at :code:`ci`. Note that even
 though BOOM template is cloned during the CI process, the BOOM repository specifies
-which version of Rocket Chip to use (which in turn determines the proper version of
+which version of Rocket-Chip to use (which in turn determines the proper version of
 riscv-tools).
 
 Current Configurations Tested: