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Fix Interrupt/Hart Mapping and BOOM Hart 0 Default #278

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merged 1 commit into from
Jun 10, 2019
Merged

Fix Interrupt/Hart Mapping and BOOM Hart 0 Default #278

merged 1 commit into from
Jun 10, 2019

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abejgonzalez
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Fixes a bug where assigning hartId of 0 to BOOM would not match with that the interrupts would be assigned in the PLIC and CLINT. This was due to the ordering of the connectInterrupts function.

Additionally, have the WithRenumberHarts have BOOM harts be ordered before Rocket harts.

@abejgonzalez abejgonzalez self-assigned this Jun 6, 2019
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Im pretty sure this is a bug with the RocketSubsystem. I assume they don't allow cores to arbitrarily change their hartId which will break the CLINT interrupt mapping.

Checking as we speak.

@abejgonzalez
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I can confirm that this issue also does present itself in Rocket.

@abejgonzalez
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Since this will apply to things in project-template... any thoughts @colinschmidt (are there some rocket-chip people I should add?)

colinschmidt
colinschmidt approved these changes Jun 7, 2019
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LGTM. We could probably upstream the sort by hartID thing but it wouldn't help project-template anyways so its probably not worth it. Unless you have a simple config that renumbers harts and breaks rocket-chip.

@jerryz123 jerryz123 merged commit b2eed81 into master Jun 10, 2019
@abejgonzalez abejgonzalez deleted the order-interrupt-connections branch June 10, 2019 21:02
@abejgonzalez abejgonzalez mentioned this pull request Jun 12, 2019
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jerryz123 pushed a commit that referenced this pull request Mar 11, 2021
@abejgonzalez
Merge pull request #278 from ucb-bar/toolchain
22980a0 
Fix SRCDIR for qemu build
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@colinschmidt colinschmidt colinschmidt approved these changes

@jerryz123 jerryz123 jerryz123 approved these changes

@bkorpan bkorpan bkorpan approved these changes

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