Inconsistent design: parameter order of vcompress #167
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Resolve for v1.0
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eopXD
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Resolve for v1.0
eopXD
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This makes instructions of mnemonic vvm, vxm have consistent intrinsic interface. Old: vint32m1_t vmerge_vvm_i32m1 (vbool32_t mask, vint32m1_t op1, vint32m1_t op2, size_t vl); New: vint32m1_t vmerge_vvm_i32m1 (vint32m1_t op1, vint32m1_t op2, vbool32_t selector, size_t vl); Old: vint32m1_t vcompress_vm_i32m1 (vbool32_t mask, vint32m1_t src, size_t vl); New: vint32m1_t vcompress_vm_i32m1 (vint32m1_t src, vbool32_t selector, size_t vl); Address following issues: #140 #167 Signed-off-by: eop Chen <eop.chen@sifive.com>
eopXD
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From: vint32m1_t vmerge_vvm_i32m1 (vbool32_t mask, vint32m1_t op1, vint32m1_t op2, size_t vl); vint32m1_t vcompress_vm_i32m1 (vbool32_t mask, vint32m1_t src, size_t vl); To: vint32m1_t vmerge_vvm_i32m1 (vint32m1_t op1, vint32m1_t op2, vbool32_t selector, size_t vl); vint32m1_t vcompress_vm_i32m1 (vint32m1_t src, vbool32_t selector, size_t vl); Address issues: riscv-non-isa/rvv-intrinsic-doc#140 riscv-non-isa/rvv-intrinsic-doc#167 Pull request: riscv-non-isa/rvv-intrinsic-doc#185 Reviewed By: craig.topper Differential Revision: https://reviews.llvm.org/D140686
CarlosAlbertoEnciso
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From: vint32m1_t vmerge_vvm_i32m1 (vbool32_t mask, vint32m1_t op1, vint32m1_t op2, size_t vl); vint32m1_t vcompress_vm_i32m1 (vbool32_t mask, vint32m1_t src, size_t vl); To: vint32m1_t vmerge_vvm_i32m1 (vint32m1_t op1, vint32m1_t op2, vbool32_t selector, size_t vl); vint32m1_t vcompress_vm_i32m1 (vint32m1_t src, vbool32_t selector, size_t vl); Address issues: riscv-non-isa/rvv-intrinsic-doc#140 riscv-non-isa/rvv-intrinsic-doc#167 Pull request: riscv-non-isa/rvv-intrinsic-doc#185 Reviewed By: craig.topper Differential Revision: https://reviews.llvm.org/D140686
veselypeta
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From: vint32m1_t vmerge_vvm_i32m1 (vbool32_t mask, vint32m1_t op1, vint32m1_t op2, size_t vl); vint32m1_t vcompress_vm_i32m1 (vbool32_t mask, vint32m1_t src, size_t vl); To: vint32m1_t vmerge_vvm_i32m1 (vint32m1_t op1, vint32m1_t op2, vbool32_t selector, size_t vl); vint32m1_t vcompress_vm_i32m1 (vint32m1_t src, vbool32_t selector, size_t vl); Address issues: riscv-non-isa/rvv-intrinsic-doc#140 riscv-non-isa/rvv-intrinsic-doc#167 Pull request: riscv-non-isa/rvv-intrinsic-doc#185 Reviewed By: craig.topper Differential Revision: https://reviews.llvm.org/D140686
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This is the current interface
vint8mf8_t vcompress_vm_i8mf8 (vbool64_t mask, vint8mf8_t dest, vint8mf8_t src, size_t vl);However, vcompress is an unmasked instruction. The mask here is not a v0.t.
The interface should be
vint8mf8_t vcompress_vm_i8mf8 (vint8mf8_t dest, vint8mf8_t op1, vbool64_t op2, size_t vl);The text was updated successfully, but these errors were encountered: